Merge pull request #19 from Przemog1/armageddon

Fixes

Author: Przemog1

include/irr/asset/IAsset.h

@@ -231,7 +231,7 @@ class IAsset : virtual public core::IReferenceCounted
 		inline bool isImmutable_debug()
 		{
 			const bool imm = getMutability() == EM_IMMUTABLE;
-			//_IRR_DEBUG_BREAK_IF(imm);
+			//_NBL_DEBUG_BREAK_IF(imm);
 			return imm;
 		}
 

include/irr/asset/IAssetLoader.h

@@ -158,7 +158,7 @@ class IAssetLoader : public virtual core::IReferenceCounted
     class IAssetLoaderOverride
     {
     protected:
-		_IRR_STATIC_INLINE_CONSTEXPR IAsset::E_MUTABILITY ASSET_MUTABILITY_ON_CACHE_INSERT = IAsset::EM_MUTABLE;
+		_NBL_STATIC_INLINE_CONSTEXPR IAsset::E_MUTABILITY ASSET_MUTABILITY_ON_CACHE_INSERT = IAsset::EM_MUTABLE;
 
         IAssetManager* m_manager;
 		io::IFileSystem* m_filesystem;

include/irr/asset/IVirtualTexture.h

@@ -434,7 +434,7 @@ class IVirtualTexture : public core::IReferenceCounted, public IVirtualTextureBa
         static uint8_t* allocReservedSpaceForAllocator(uint32_t tilesPerDim, uint32_t layers)
         {
             const size_t tiles = tilesPerDim*tilesPerDim*layers;
-            void* mem = _IRR_ALIGNED_MALLOC(phys_pg_addr_alctr_t::reserved_size(1u, tiles, 1u), _IRR_SIMD_ALIGNMENT);
+            void* mem = _NBL_ALIGNED_MALLOC(phys_pg_addr_alctr_t::reserved_size(1u, tiles, 1u), _NBL_SIMD_ALIGNMENT);
             return reinterpret_cast<uint8_t*>(mem);
         }
 
@@ -726,7 +726,7 @@ class IVirtualTexture : public core::IReferenceCounted, public IVirtualTextureBa
         uint32_t pgtabSzSqr = (1u << szxy_log2);
         pgtabSzSqr *= pgtabSzSqr;
         const size_t spacePerAllocator = pg_tab_addr_alctr_t::reserved_size(pgtabSzSqr, pgtabSzSqr, 1u);
-        m_pgTabAddrAlctr_reservedSpc = reinterpret_cast<uint8_t*>(_IRR_ALIGNED_MALLOC(spacePerAllocator * _layers, _IRR_SIMD_ALIGNMENT));
+        m_pgTabAddrAlctr_reservedSpc = reinterpret_cast<uint8_t*>(_NBL_ALIGNED_MALLOC(spacePerAllocator * _layers, _NBL_SIMD_ALIGNMENT));
         for (uint32_t i = 0u; i < _layers; ++i)
         {
             auto& alctr = m_pageTableLayerAllocators[i];

include/irr/asset/material_compiler/IFrontend.h

@@ -1,5 +1,5 @@
-#ifndef __IRR_MATERIAL_COMPILER_I_FRONTEND_H_INCLUDED__
-#define __IRR_MATERIAL_COMPILER_I_FRONTEND_H_INCLUDED__
+#ifndef __NBL_MATERIAL_COMPILER_I_FRONTEND_H_INCLUDED__
+#define __NBL_MATERIAL_COMPILER_I_FRONTEND_H_INCLUDED__
 
 #include <irr/core/IReferenceCounted.h>
 #include <irr/asset/material_compiler/IR.h>

include/irr/ext/MitsubaLoader/SContext.h

@@ -140,7 +140,7 @@ namespace MitsubaLoader
 		{
 			SInstanceData(core::matrix3x4SIMD _tform, SContext::bsdf_type _bsdf, const std::string& _id, const CElementEmitter& _emitter) : 
 				tform(_tform), bsdf(_bsdf),
-#if defined(_IRR_DEBUG) || defined(_IRR_RELWITHDEBINFO)
+#if defined(_NBL_DEBUG) || defined(_NBL_RELWITHDEBINFO)
 				bsdf_id(_id),
 #endif
 				emitter(_emitter)

include/irr/video/CPropertyPoolHandler.h

@@ -111,7 +111,7 @@ class CPropertyPoolHandler final : public core::IReferenceCounted, public core::
 				{
 					#ifdef _NBL_DEBUG
 					assert(unusedSets && set.get());
-					#endif // _IRR_DEBUG
+					#endif // _NBL_DEBUG
 					unusedSets->push_back(std::move(set));
 				}
 		};

src/irr/CMakeLists.txt

@@ -2,8 +2,6 @@
 # This file is part of the "Nabla Engine".
 # For conditions of distribution and use, see copyright notice in nabla.h
 
-add_subdirectory(ext)
-
 find_package(OpenGL REQUIRED)
 if(UNIX)
 	find_package(X11 REQUIRED)

src/irr/asset/CMeshManipulator.cpp

@@ -737,7 +737,7 @@ core::smart_refctd_ptr<ICPUMeshBuffer> IMeshManipulator::createOptimizedMeshBuff
 
 			const size_t vertexSize = pipeline->getVertexInputParams().bindings[0].stride;
 			uint8_t* const v = (uint8_t*)(outbuffer->getAttribBoundBuffer(posId)->buffer->getPointer()); // after prefetch optim. we have guarantee of single vertex buffer so we can do like this
-			uint8_t* const vCopy = (uint8_t*)_NBL_ALIGNED_MALLOC(bufsz,_IRR_SIMD_ALIGNMENT);
+			uint8_t* const vCopy = (uint8_t*)_NBL_ALIGNED_MALLOC(bufsz, _NBL_SIMD_ALIGNMENT);
 			memcpy(vCopy, v, bufsz);
 
 			size_t baseVtx = outbuffer->getBaseVertex();

src/irr/asset/CPLYMeshWriter.cpp

@@ -171,7 +171,7 @@ bool CPLYMeshWriter::writeAsset(io::IWriteFile* _file, const SAssetWriteParams&
         }
     }
     else {
-        indices = _IRR_ALIGNED_MALLOC(idxCnt * (idxtype == asset::EIT_16BIT ? 2u : 4u), _IRR_SIMD_ALIGNMENT);
+        indices = _NBL_ALIGNED_MALLOC(idxCnt * (idxtype == asset::EIT_16BIT ? 2u : 4u), _NBL_SIMD_ALIGNMENT);
         memcpy(indices, meshBuffer->getIndices(), idxCnt * (idxtype == asset::EIT_16BIT ? 2u : 4u));
     }