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theoreticalphysicsftwtheoreticalphysicsftw
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Fix compilation errors in CComputeBlit.
1 parent 3e03f86 commit 43bff17

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+63
-42
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+63
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‎include/nbl/video/utilities/CComputeBlit.h

Lines changed: 63 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -63,12 +63,12 @@ namespace nbl::video
6363

6464
for (auto i = 0; i < static_cast<uint8_t>(EBT_COUNT); ++i)
6565
{
66-
result->m_blitPipelineLayout[i] = result->m_device->createPipelineLayout(&pcRange, &pcRange + 1ull, core::smart_refctd_ptr(result->m_blitDSLayout[i]), core::smart_refctd_ptr(result->m_kernelWeightsDSLayout));
66+
result->m_blitPipelineLayout[i] = result->m_device->createPipelineLayout({ &pcRange, &pcRange + 1ull }, core::smart_refctd_ptr(result->m_blitDSLayout[i]), core::smart_refctd_ptr(result->m_kernelWeightsDSLayout));
6767
if (!result->m_blitPipelineLayout[i])
6868
return nullptr;
6969
}
7070

71-
result->m_coverageAdjustmentPipelineLayout = result->m_device->createPipelineLayout(&pcRange, &pcRange + 1ull, core::smart_refctd_ptr(result->m_blitDSLayout[EBT_COVERAGE_ADJUSTMENT]));
71+
result->m_coverageAdjustmentPipelineLayout = result->m_device->createPipelineLayout({ &pcRange, &pcRange + 1ull }, core::smart_refctd_ptr(result->m_blitDSLayout[EBT_COVERAGE_ADJUSTMENT]));
7272
if (!result->m_coverageAdjustmentPipelineLayout)
7373
return nullptr;
7474

@@ -110,7 +110,7 @@ namespace nbl::video
110110
}
111111

112112
// @param `alphaBinCount` is only required to size the histogram present in the default nbl_glsl_blit_AlphaStatistics_t in default_compute_common.comp
113-
core::smart_refctd_ptr<video::IGPUSpecializedShader> createAlphaTestSpecializedShader(const asset::IImage::E_TYPE inImageType, const uint32_t alphaBinCount = asset::IBlitUtilities::DefaultAlphaBinCount);
113+
core::smart_refctd_ptr<video::IGPUShader> createAlphaTestSpecializedShader(const asset::IImage::E_TYPE inImageType, const uint32_t alphaBinCount = asset::IBlitUtilities::DefaultAlphaBinCount);
114114

115115
core::smart_refctd_ptr<video::IGPUComputePipeline> getAlphaTestPipeline(const uint32_t alphaBinCount, const asset::IImage::E_TYPE imageType)
116116
{
@@ -124,13 +124,17 @@ namespace nbl::video
124124
return m_alphaTestPipelines[pipelineIndex][imageType];
125125

126126
auto specShader = createAlphaTestSpecializedShader(imageType, paddedAlphaBinCount);
127-
m_alphaTestPipelines[pipelineIndex][imageType] = m_device->createComputePipeline(nullptr, core::smart_refctd_ptr(m_blitPipelineLayout[EBT_COVERAGE_ADJUSTMENT]), std::move(specShader));
127+
IGPUComputePipeline::SCreationParams creationParams;
128+
creationParams.shader.shader = specShader.get();
129+
creationParams.shader.entryPoint = "main";
130+
creationParams.layout = m_blitPipelineLayout[EBT_COVERAGE_ADJUSTMENT].get();
131+
assert(m_device->createComputePipelines(nullptr, { &creationParams, &creationParams + 1 }, &m_alphaTestPipelines[pipelineIndex][imageType]));
128132

129133
return m_alphaTestPipelines[pipelineIndex][imageType];
130134
}
131135

132136
// @param `outFormat` dictates encoding.
133-
core::smart_refctd_ptr<video::IGPUSpecializedShader> createNormalizationSpecializedShader(const asset::IImage::E_TYPE inImageType, const asset::E_FORMAT outFormat,
137+
core::smart_refctd_ptr<video::IGPUShader> createNormalizationSpecializedShader(const asset::IImage::E_TYPE inImageType, const asset::E_FORMAT outFormat,
134138
const uint32_t alphaBinCount = asset::IBlitUtilities::DefaultAlphaBinCount);
135139

136140
core::smart_refctd_ptr<video::IGPUComputePipeline> getNormalizationPipeline(const asset::IImage::E_TYPE imageType, const asset::E_FORMAT outFormat,
@@ -143,14 +147,18 @@ namespace nbl::video
143147
if (m_normalizationPipelines.find(key) == m_normalizationPipelines.end())
144148
{
145149
auto specShader = createNormalizationSpecializedShader(imageType, outFormat, paddedAlphaBinCount);
146-
m_normalizationPipelines[key] = m_device->createComputePipeline(nullptr, core::smart_refctd_ptr(m_blitPipelineLayout[EBT_COVERAGE_ADJUSTMENT]), std::move(specShader));
150+
IGPUComputePipeline::SCreationParams creationParams;
151+
creationParams.shader.shader = specShader.get();
152+
creationParams.shader.entryPoint = "main";
153+
creationParams.layout = m_blitPipelineLayout[EBT_COVERAGE_ADJUSTMENT].get();
154+
assert(m_device->createComputePipelines(nullptr, { &creationParams, &creationParams + 1 }, &m_normalizationPipelines[key]));
147155
}
148156

149157
return m_normalizationPipelines[key];
150158
}
151159

152160
template <typename BlitUtilities>
153-
core::smart_refctd_ptr<video::IGPUSpecializedShader> createBlitSpecializedShader(
161+
core::smart_refctd_ptr<video::IGPUShader> createBlitSpecializedShader(
154162
const asset::E_FORMAT outFormat,
155163
const asset::IImage::E_TYPE imageType,
156164
const core::vectorSIMDu32& inExtent,
@@ -221,10 +229,9 @@ namespace nbl::video
221229
"}\n";
222230

223231
auto cpuShader = core::make_smart_refctd_ptr<asset::ICPUShader>(shaderSourceStream.str().c_str(), asset::IShader::ESS_COMPUTE, asset::IShader::E_CONTENT_TYPE::ECT_HLSL, "CComputeBlit::createBlitSpecializedShader");
224-
auto gpuUnspecShader = m_device->createShader(std::move(cpuShader));
225-
auto specShader = m_device->createSpecializedShader(gpuUnspecShader.get(), { nullptr, nullptr, "main" });
232+
auto gpuShader = m_device->createShader(std::move(cpuShader));
226233

227-
return specShader;
234+
return gpuShader;
228235
}
229236

230237
template <typename BlitUtilities>
@@ -264,7 +271,11 @@ namespace nbl::video
264271
workgroupSize,
265272
paddedAlphaBinCount);
266273

267-
m_blitPipelines[key] = m_device->createComputePipeline(nullptr, core::smart_refctd_ptr(m_blitPipelineLayout[blitType]), std::move(specShader));
274+
IGPUComputePipeline::SCreationParams creationParams;
275+
creationParams.shader.shader = specShader.get();
276+
creationParams.shader.entryPoint = "main";
277+
creationParams.layout = m_blitPipelineLayout[blitType].get();
278+
m_device->createComputePipelines(nullptr, { &creationParams, &creationParams + 1 }, &m_blitPipelines[key]);
268279
}
269280

270281
return m_blitPipelines[key];
@@ -507,7 +518,6 @@ namespace nbl::video
507518
write.arrayElement = 0u;
508519
write.count = redirect.getCount(IGPUDescriptorSetLayout::CBindingRedirect::storage_range_index_t{ i });
509520
write.info = &infos[infoIdx];
510-
write.descriptorType = type;
511521

512522
infoIdx += write.count;
513523
}
@@ -545,11 +555,11 @@ namespace nbl::video
545555
}
546556

547557
infos[0].desc = inImageView;
548-
infos[0].info.image.imageLayout = asset::IImage::EL_SHADER_READ_ONLY_OPTIMAL;
558+
infos[0].info.image.imageLayout = asset::IImage::LAYOUT::READ_ONLY_OPTIMAL;
549559
infos[0].info.image.sampler = samplers[wrapU][wrapV][wrapW][borderColor];
550560

551561
infos[1].desc = outImageView;
552-
infos[1].info.image.imageLayout = asset::IImage::EL_GENERAL;
562+
infos[1].info.image.imageLayout = asset::IImage::LAYOUT::GENERAL;
553563
infos[1].info.image.sampler = nullptr;
554564

555565
if (coverageAdjustmentScratchBuffer)
@@ -633,31 +643,37 @@ namespace nbl::video
633643
buildNormalizationDispatchInfo(dispatchInfo, outImageExtent, inImageType, layersToBlit);
634644

635645
assert(coverageAdjustmentScratchBuffer);
636-
646+
IGPUCommandBuffer::SPipelineBarrierDependencyInfo depInfo;
637647
// Memory dependency to ensure the alpha test pass has finished writing to alphaTestCounterBuffer
638-
video::IGPUCommandBuffer::SBufferMemoryBarrier alphaTestBarrier = {};
639-
alphaTestBarrier.barrier.srcAccessMask = asset::EAF_SHADER_WRITE_BIT;
640-
alphaTestBarrier.barrier.dstAccessMask = asset::EAF_SHADER_READ_BIT;
641-
alphaTestBarrier.srcQueueFamilyIndex = ~0u;
642-
alphaTestBarrier.dstQueueFamilyIndex = ~0u;
643-
alphaTestBarrier.buffer = coverageAdjustmentScratchBuffer;
644-
alphaTestBarrier.size = coverageAdjustmentScratchBuffer->getSize();
645-
alphaTestBarrier.offset = 0;
648+
video::IGPUCommandBuffer::SPipelineBarrierDependencyInfo::buffer_barrier_t alphaTestBarrier = {};
649+
alphaTestBarrier.barrier.dep.srcStageMask = asset::PIPELINE_STAGE_FLAGS::COMPUTE_SHADER_BIT;
650+
alphaTestBarrier.barrier.dep.srcAccessMask = asset::ACCESS_FLAGS::SHADER_WRITE_BITS;
651+
alphaTestBarrier.barrier.dep.dstStageMask = asset::PIPELINE_STAGE_FLAGS::COMPUTE_SHADER_BIT;
652+
alphaTestBarrier.barrier.dep.dstAccessMask = asset::ACCESS_FLAGS::SHADER_READ_BITS;
653+
alphaTestBarrier.range.buffer = coverageAdjustmentScratchBuffer;
654+
alphaTestBarrier.range.size = coverageAdjustmentScratchBuffer->getSize();
655+
alphaTestBarrier.range.offset = 0;
646656

647657
// Memory dependency to ensure that the previous compute pass has finished writing to the output image,
648658
// also transitions the layout of said image: GENERAL -> SHADER_READ_ONLY_OPTIMAL
649-
video::IGPUCommandBuffer::SImageMemoryBarrier readyForNorm = {};
650-
readyForNorm.barrier.srcAccessMask = asset::EAF_SHADER_WRITE_BIT;
651-
readyForNorm.barrier.dstAccessMask = static_cast<asset::E_ACCESS_FLAGS>(asset::EAF_SHADER_READ_BIT);
652-
readyForNorm.oldLayout = asset::IImage::EL_GENERAL;
653-
readyForNorm.newLayout = asset::IImage::EL_SHADER_READ_ONLY_OPTIMAL;
654-
readyForNorm.srcQueueFamilyIndex = ~0u;
655-
readyForNorm.dstQueueFamilyIndex = ~0u;
659+
video::IGPUCommandBuffer::SPipelineBarrierDependencyInfo::image_barrier_t readyForNorm = {};
660+
readyForNorm.barrier.dep.srcStageMask = asset::PIPELINE_STAGE_FLAGS::COMPUTE_SHADER_BIT;
661+
readyForNorm.barrier.dep.srcAccessMask = asset::ACCESS_FLAGS::SHADER_WRITE_BITS;
662+
readyForNorm.barrier.dep.dstStageMask = asset::PIPELINE_STAGE_FLAGS::COMPUTE_SHADER_BIT;
663+
readyForNorm.barrier.dep.dstAccessMask = asset::ACCESS_FLAGS::SHADER_READ_BITS;
664+
readyForNorm.oldLayout = video::IGPUImage::LAYOUT::GENERAL;
665+
readyForNorm.newLayout = video::IGPUImage::LAYOUT::READ_ONLY_OPTIMAL;
656666
readyForNorm.image = normalizationInImage;
657667
readyForNorm.subresourceRange.aspectMask = asset::IImage::EAF_COLOR_BIT;
658668
readyForNorm.subresourceRange.levelCount = 1u;
659669
readyForNorm.subresourceRange.layerCount = normalizationInImage->getCreationParameters().arrayLayers;
660-
cmdbuf->pipelineBarrier(asset::EPSF_COMPUTE_SHADER_BIT, asset::EPSF_COMPUTE_SHADER_BIT, asset::EDF_NONE, 0u, nullptr, 1u, &alphaTestBarrier, 1u, &readyForNorm);
670+
671+
depInfo.bufBarrierCount = 1;
672+
depInfo.bufBarriers = &alphaTestBarrier;
673+
depInfo.imgBarrierCount = 1;
674+
depInfo.imgBarriers = &readyForNorm;
675+
676+
cmdbuf->pipelineBarrier(asset::E_DEPENDENCY_FLAGS::EDF_NONE, &depInfo);
661677

662678
cmdbuf->bindDescriptorSets(asset::EPBP_COMPUTE, normalizationPipeline->getLayout(), 0u, 1u, &normalizationDS);
663679
cmdbuf->bindComputePipeline(normalizationPipeline);
@@ -667,24 +683,29 @@ namespace nbl::video
667683

668684
//! WARNING: This function blocks and stalls the GPU!
669685
template <typename BlitUtilities, typename... Args>
670-
inline void blit(video::IGPUQueue* computeQueue, Args&&... args)
686+
inline void blit(video::IQueue* computeQueue, Args&&... args)
671687
{
672-
auto cmdpool = m_device->createCommandPool(computeQueue->getFamilyIndex(), video::IGPUCommandPool::ECF_NONE);
688+
auto cmdPool = m_device->createCommandPool(computeQueue->getFamilyIndex(), video::IGPUCommandPool::ECF_NONE);
673689
core::smart_refctd_ptr<video::IGPUCommandBuffer> cmdbuf;
674-
m_device->createCommandBuffers(cmdpool.get(), video::IGPUCommandBuffer::EL_PRIMARY, 1u, &cmdbuf);
690+
cmdPool->createCommandBuffers(video::IGPUCommandBuffer::EL_PRIMARY, { &cmdbuf, &cmdbuf + 1 });
675691

676-
auto fence = m_device->createFence(video::IGPUFence::ECF_UNSIGNALED);
692+
auto semaphore = m_device->createSemaphore(0);
677693

678694
cmdbuf->begin(video::IGPUCommandBuffer::EU_ONE_TIME_SUBMIT_BIT);
679695
blit<BlitUtilities>(cmdbuf.get(), std::forward<Args>(args)...);
680696
cmdbuf->end();
681697

682-
video::IGPUQueue::SSubmitInfo submitInfo = {};
683-
submitInfo.commandBufferCount = 1u;
684-
submitInfo.commandBuffers = &cmdbuf.get();
685-
computeQueue->submit(1u, &submitInfo, fence.get());
686-
687-
m_device->blockForFences(1u, &fence.get());
698+
video::IQueue::SSubmitInfo submitInfo;
699+
video::IQueue::SSubmitInfo::SSemaphoreInfo signalInfo;
700+
submitInfo.commandBuffers = { &cmdbuf, &cmdbuf + 1 };
701+
submitInfo.signalSemaphores = { &signalInfo, &signalInfo + 1 };
702+
signalInfo.semaphore = semaphore.get();
703+
signalInfo.value = 1;
704+
signalInfo.stageMask = asset::PIPELINE_STAGE_FLAGS::ALL_COMMANDS_BIT;
705+
computeQueue->submit({ &submitInfo, &submitInfo + 1 });
706+
707+
video::ILogicalDevice::SSemaphoreWaitInfo waitInfos{ semaphore.get(), 1 };
708+
m_device->blockForSemaphores({ &waitInfos, &waitInfos + 1});
688709
}
689710

690711
//! Returns the original format if supports STORAGE_IMAGE otherwise returns a format in its compat class which supports STORAGE_IMAGE.
@@ -853,7 +874,7 @@ namespace nbl::video
853874
bindings[i].type = descriptorTypes[i];
854875
}
855876

856-
auto dsLayout = logicalDevice->createDescriptorSetLayout(bindings, bindings + descriptorCount);
877+
auto dsLayout = logicalDevice->createDescriptorSetLayout({ bindings, bindings + descriptorCount });
857878
return dsLayout;
858879
}
859880

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