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Merge pull request KhronosGroup#269 from KornevNikita/uniform_group_instructions
Implement SPV_KHR_uniform_group_instructions extension
2 parents 0e994ee + 7744288 commit 4995a2f

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9 files changed

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lines changed

9 files changed

+216
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‎include/spirv/unified1/spirv.core.grammar.json

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8573,6 +8573,118 @@
85738573
],
85748574
"capabilities" : [ "SplitBarrierINTEL" ],
85758575
"version" : "None"
8576+
},
8577+
{
8578+
"opname" : "OpGroupIMulKHR",
8579+
"class" : "Group",
8580+
"opcode" : 6401,
8581+
"operands" : [
8582+
{ "kind" : "IdResultType" },
8583+
{ "kind" : "IdResult" },
8584+
{ "kind" : "IdScope", "name" : "'Execution'" },
8585+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8586+
{ "kind" : "IdRef", "name" : "'X'" }
8587+
],
8588+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8589+
"version" : "None"
8590+
},
8591+
{
8592+
"opname" : "OpGroupFMulKHR",
8593+
"class" : "Group",
8594+
"opcode" : 6402,
8595+
"operands" : [
8596+
{ "kind" : "IdResultType" },
8597+
{ "kind" : "IdResult" },
8598+
{ "kind" : "IdScope", "name" : "'Execution'" },
8599+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8600+
{ "kind" : "IdRef", "name" : "'X'" }
8601+
],
8602+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8603+
"version" : "None"
8604+
},
8605+
{
8606+
"opname" : "OpGroupBitwiseAndKHR",
8607+
"class" : "Group",
8608+
"opcode" : 6403,
8609+
"operands" : [
8610+
{ "kind" : "IdResultType" },
8611+
{ "kind" : "IdResult" },
8612+
{ "kind" : "IdScope", "name" : "'Execution'" },
8613+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8614+
{ "kind" : "IdRef", "name" : "'X'" }
8615+
],
8616+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8617+
"version" : "None"
8618+
},
8619+
{
8620+
"opname" : "OpGroupBitwiseOrKHR",
8621+
"class" : "Group",
8622+
"opcode" : 6404,
8623+
"operands" : [
8624+
{ "kind" : "IdResultType" },
8625+
{ "kind" : "IdResult" },
8626+
{ "kind" : "IdScope", "name" : "'Execution'" },
8627+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8628+
{ "kind" : "IdRef", "name" : "'X'" }
8629+
],
8630+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8631+
"version" : "None"
8632+
},
8633+
{
8634+
"opname" : "OpGroupBitwiseXorKHR",
8635+
"class" : "Group",
8636+
"opcode" : 6405,
8637+
"operands" : [
8638+
{ "kind" : "IdResultType" },
8639+
{ "kind" : "IdResult" },
8640+
{ "kind" : "IdScope", "name" : "'Execution'" },
8641+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8642+
{ "kind" : "IdRef", "name" : "'X'" }
8643+
],
8644+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8645+
"version" : "None"
8646+
},
8647+
{
8648+
"opname" : "OpGroupLogicalAndKHR",
8649+
"class" : "Group",
8650+
"opcode" : 6406,
8651+
"operands" : [
8652+
{ "kind" : "IdResultType" },
8653+
{ "kind" : "IdResult" },
8654+
{ "kind" : "IdScope", "name" : "'Execution'" },
8655+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8656+
{ "kind" : "IdRef", "name" : "'X'" }
8657+
],
8658+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8659+
"version" : "None"
8660+
},
8661+
{
8662+
"opname" : "OpGroupLogicalOrKHR",
8663+
"class" : "Group",
8664+
"opcode" : 6407,
8665+
"operands" : [
8666+
{ "kind" : "IdResultType" },
8667+
{ "kind" : "IdResult" },
8668+
{ "kind" : "IdScope", "name" : "'Execution'" },
8669+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8670+
{ "kind" : "IdRef", "name" : "'X'" }
8671+
],
8672+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8673+
"version" : "None"
8674+
},
8675+
{
8676+
"opname" : "OpGroupLogicalXorKHR",
8677+
"class" : "Group",
8678+
"opcode" : 6408,
8679+
"operands" : [
8680+
{ "kind" : "IdResultType" },
8681+
{ "kind" : "IdResult" },
8682+
{ "kind" : "IdScope", "name" : "'Execution'" },
8683+
{ "kind" : "GroupOperation", "name" : "'Operation'" },
8684+
{ "kind" : "IdRef", "name" : "'X'" }
8685+
],
8686+
"capabilities" : [ "GroupUniformArithmeticKHR" ],
8687+
"version" : "None"
85768688
}
85778689
],
85788690
"operand_kinds" : [
@@ -13911,6 +14023,12 @@
1391114023
"value" : 6141,
1391214024
"extensions" : [ "SPV_INTEL_split_barrier" ],
1391314025
"version" : "None"
14026+
},
14027+
{
14028+
"enumerant" : "GroupUniformArithmeticKHR",
14029+
"value" : 6400,
14030+
"extensions" : [ "SPV_KHR_uniform_group_instructions"],
14031+
"version" : "None"
1391414032
}
1391514033
]
1391614034
},

‎include/spirv/unified1/spirv.cs

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Original file line numberDiff line numberDiff line change
@@ -1088,6 +1088,7 @@ public enum Capability
10881088
AtomicFloat16AddEXT = 6095,
10891089
DebugInfoModuleINTEL = 6114,
10901090
SplitBarrierINTEL = 6141,
1091+
GroupUniformArithmeticKHR = 6400,
10911092
}
10921093

10931094
public enum RayFlagsShift
@@ -1854,6 +1855,14 @@ public enum Op
18541855
OpSpecConstantCompositeContinuedINTEL = 6092,
18551856
OpControlBarrierArriveINTEL = 6142,
18561857
OpControlBarrierWaitINTEL = 6143,
1858+
OpGroupIMulKHR = 6401,
1859+
OpGroupFMulKHR = 6402,
1860+
OpGroupBitwiseAndKHR = 6403,
1861+
OpGroupBitwiseOrKHR = 6404,
1862+
OpGroupBitwiseXorKHR = 6405,
1863+
OpGroupLogicalAndKHR = 6406,
1864+
OpGroupLogicalOrKHR = 6407,
1865+
OpGroupLogicalXorKHR = 6408,
18571866
}
18581867
}
18591868
}

‎include/spirv/unified1/spirv.h

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@@ -1088,6 +1088,7 @@ typedef enum SpvCapability_ {
10881088
SpvCapabilityAtomicFloat16AddEXT = 6095,
10891089
SpvCapabilityDebugInfoModuleINTEL = 6114,
10901090
SpvCapabilitySplitBarrierINTEL = 6141,
1091+
SpvCapabilityGroupUniformArithmeticKHR = 6400,
10911092
SpvCapabilityMax = 0x7fffffff,
10921093
} SpvCapability;
10931094

@@ -1852,6 +1853,14 @@ typedef enum SpvOp_ {
18521853
SpvOpSpecConstantCompositeContinuedINTEL = 6092,
18531854
SpvOpControlBarrierArriveINTEL = 6142,
18541855
SpvOpControlBarrierWaitINTEL = 6143,
1856+
SpvOpGroupIMulKHR = 6401,
1857+
SpvOpGroupFMulKHR = 6402,
1858+
SpvOpGroupBitwiseAndKHR = 6403,
1859+
SpvOpGroupBitwiseOrKHR = 6404,
1860+
SpvOpGroupBitwiseXorKHR = 6405,
1861+
SpvOpGroupLogicalAndKHR = 6406,
1862+
SpvOpGroupLogicalOrKHR = 6407,
1863+
SpvOpGroupLogicalXorKHR = 6408,
18551864
SpvOpMax = 0x7fffffff,
18561865
} SpvOp;
18571866

@@ -2511,6 +2520,14 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
25112520
case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
25122521
case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
25132522
case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
2523+
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
2524+
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
2525+
case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
2526+
case SpvOpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
2527+
case SpvOpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
2528+
case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
2529+
case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
2530+
case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
25142531
}
25152532
}
25162533
#endif /* SPV_ENABLE_UTILITY_CODE */

‎include/spirv/unified1/spirv.hpp

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@@ -1084,6 +1084,7 @@ enum Capability {
10841084
CapabilityAtomicFloat16AddEXT = 6095,
10851085
CapabilityDebugInfoModuleINTEL = 6114,
10861086
CapabilitySplitBarrierINTEL = 6141,
1087+
CapabilityGroupUniformArithmeticKHR = 6400,
10871088
CapabilityMax = 0x7fffffff,
10881089
};
10891090

@@ -1848,6 +1849,14 @@ enum Op {
18481849
OpSpecConstantCompositeContinuedINTEL = 6092,
18491850
OpControlBarrierArriveINTEL = 6142,
18501851
OpControlBarrierWaitINTEL = 6143,
1852+
OpGroupIMulKHR = 6401,
1853+
OpGroupFMulKHR = 6402,
1854+
OpGroupBitwiseAndKHR = 6403,
1855+
OpGroupBitwiseOrKHR = 6404,
1856+
OpGroupBitwiseXorKHR = 6405,
1857+
OpGroupLogicalAndKHR = 6406,
1858+
OpGroupLogicalOrKHR = 6407,
1859+
OpGroupLogicalXorKHR = 6408,
18511860
OpMax = 0x7fffffff,
18521861
};
18531862

@@ -2507,6 +2516,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
25072516
case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
25082517
case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
25092518
case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
2519+
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
2520+
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
2521+
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
2522+
case OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
2523+
case OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
2524+
case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
2525+
case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
2526+
case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
25102527
}
25112528
}
25122529
#endif /* SPV_ENABLE_UTILITY_CODE */

‎include/spirv/unified1/spirv.hpp11

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1084,6 +1084,7 @@ enum class Capability : unsigned {
10841084
AtomicFloat16AddEXT = 6095,
10851085
DebugInfoModuleINTEL = 6114,
10861086
SplitBarrierINTEL = 6141,
1087+
GroupUniformArithmeticKHR = 6400,
10871088
Max = 0x7fffffff,
10881089
};
10891090

@@ -1848,6 +1849,14 @@ enum class Op : unsigned {
18481849
OpSpecConstantCompositeContinuedINTEL = 6092,
18491850
OpControlBarrierArriveINTEL = 6142,
18501851
OpControlBarrierWaitINTEL = 6143,
1852+
OpGroupIMulKHR = 6401,
1853+
OpGroupFMulKHR = 6402,
1854+
OpGroupBitwiseAndKHR = 6403,
1855+
OpGroupBitwiseOrKHR = 6404,
1856+
OpGroupBitwiseXorKHR = 6405,
1857+
OpGroupLogicalAndKHR = 6406,
1858+
OpGroupLogicalOrKHR = 6407,
1859+
OpGroupLogicalXorKHR = 6408,
18511860
Max = 0x7fffffff,
18521861
};
18531862

@@ -2507,6 +2516,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
25072516
case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
25082517
case Op::OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
25092518
case Op::OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
2519+
case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
2520+
case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
2521+
case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
2522+
case Op::OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
2523+
case Op::OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
2524+
case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
2525+
case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
2526+
case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
25102527
}
25112528
}
25122529
#endif /* SPV_ENABLE_UTILITY_CODE */

‎include/spirv/unified1/spirv.json

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1065,7 +1065,8 @@
10651065
"OptNoneINTEL": 6094,
10661066
"AtomicFloat16AddEXT": 6095,
10671067
"DebugInfoModuleINTEL": 6114,
1068-
"SplitBarrierINTEL": 6141
1068+
"SplitBarrierINTEL": 6141,
1069+
"GroupUniformArithmeticKHR": 6400
10691070
}
10701071
},
10711072
{
@@ -1840,7 +1841,15 @@
18401841
"OpConstantCompositeContinuedINTEL": 6091,
18411842
"OpSpecConstantCompositeContinuedINTEL": 6092,
18421843
"OpControlBarrierArriveINTEL": 6142,
1843-
"OpControlBarrierWaitINTEL": 6143
1844+
"OpControlBarrierWaitINTEL": 6143,
1845+
"OpGroupIMulKHR": 6401,
1846+
"OpGroupFMulKHR": 6402,
1847+
"OpGroupBitwiseAndKHR": 6403,
1848+
"OpGroupBitwiseOrKHR": 6404,
1849+
"OpGroupBitwiseXorKHR": 6405,
1850+
"OpGroupLogicalAndKHR": 6406,
1851+
"OpGroupLogicalOrKHR": 6407,
1852+
"OpGroupLogicalXorKHR": 6408
18441853
}
18451854
}
18461855
]

‎include/spirv/unified1/spirv.lua

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1046,6 +1046,7 @@ spv = {
10461046
AtomicFloat16AddEXT = 6095,
10471047
DebugInfoModuleINTEL = 6114,
10481048
SplitBarrierINTEL = 6141,
1049+
GroupUniformArithmeticKHR = 6400,
10491050
},
10501051

10511052
RayFlagsShift = {
@@ -1799,6 +1800,14 @@ spv = {
17991800
OpSpecConstantCompositeContinuedINTEL = 6092,
18001801
OpControlBarrierArriveINTEL = 6142,
18011802
OpControlBarrierWaitINTEL = 6143,
1803+
OpGroupIMulKHR = 6401,
1804+
OpGroupFMulKHR = 6402,
1805+
OpGroupBitwiseAndKHR = 6403,
1806+
OpGroupBitwiseOrKHR = 6404,
1807+
OpGroupBitwiseXorKHR = 6405,
1808+
OpGroupLogicalAndKHR = 6406,
1809+
OpGroupLogicalOrKHR = 6407,
1810+
OpGroupLogicalXorKHR = 6408,
18021811
},
18031812

18041813
}

‎include/spirv/unified1/spirv.py

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1046,6 +1046,7 @@
10461046
'AtomicFloat16AddEXT' : 6095,
10471047
'DebugInfoModuleINTEL' : 6114,
10481048
'SplitBarrierINTEL' : 6141,
1049+
'GroupUniformArithmeticKHR' : 6400,
10491050
},
10501051

10511052
'RayFlagsShift' : {
@@ -1799,6 +1800,14 @@
17991800
'OpSpecConstantCompositeContinuedINTEL' : 6092,
18001801
'OpControlBarrierArriveINTEL' : 6142,
18011802
'OpControlBarrierWaitINTEL' : 6143,
1803+
'OpGroupIMulKHR' : 6401,
1804+
'OpGroupFMulKHR' : 6402,
1805+
'OpGroupBitwiseAndKHR' : 6403,
1806+
'OpGroupBitwiseOrKHR' : 6404,
1807+
'OpGroupBitwiseXorKHR' : 6405,
1808+
'OpGroupLogicalAndKHR' : 6406,
1809+
'OpGroupLogicalOrKHR' : 6407,
1810+
'OpGroupLogicalXorKHR' : 6408,
18021811
},
18031812

18041813
}

‎include/spirv/unified1/spv.d

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1091,6 +1091,7 @@ enum Capability : uint
10911091
AtomicFloat16AddEXT = 6095,
10921092
DebugInfoModuleINTEL = 6114,
10931093
SplitBarrierINTEL = 6141,
1094+
GroupUniformArithmeticKHR = 6400,
10941095
}
10951096

10961097
enum RayFlagsShift : uint
@@ -1857,6 +1858,14 @@ enum Op : uint
18571858
OpSpecConstantCompositeContinuedINTEL = 6092,
18581859
OpControlBarrierArriveINTEL = 6142,
18591860
OpControlBarrierWaitINTEL = 6143,
1861+
OpGroupIMulKHR = 6401,
1862+
OpGroupFMulKHR = 6402,
1863+
OpGroupBitwiseAndKHR = 6403,
1864+
OpGroupBitwiseOrKHR = 6404,
1865+
OpGroupBitwiseXorKHR = 6405,
1866+
OpGroupLogicalAndKHR = 6406,
1867+
OpGroupLogicalOrKHR = 6407,
1868+
OpGroupLogicalXorKHR = 6408,
18601869
}
18611870

18621871

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