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Merge pull request KhronosGroup#362 from KhronosGroup/revert-348-asudarsa/add_fp_max_error_support
Revert "Add support for fp_max_error extension"
2 parents 88d56db + 5c9c561 commit 66e5000

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10 files changed

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-33
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10 files changed

+0
-33
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‎include/spirv/unified1/spirv.bf

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@@ -588,7 +588,6 @@ namespace Spv
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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ConduitKernelArgumentINTEL = 6175,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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FPGAKernelAttributesv2INTEL = 6161,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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GroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.core.grammar.json

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"capabilities" : [ "VectorComputeINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "FPMaxErrorDecorationINTEL",
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"value" : 6170,
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"parameters" : [
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{ "kind" : "LiteralFloat", "name" : "'Max Error'" }
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],
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"capabilities" : [ "FPMaxErrorINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "LatencyControlLabelINTEL",
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"value" : 6172,
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"extensions" : [ "SPV_INTEL_kernel_attributes" ],
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"version" : "None"
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},
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{
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"enumerant" : "FPMaxErrorINTEL",
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"value" : 6169,
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"extensions" : [ "SPV_INTEL_fp_max_error" ],
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"version" : "None"
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},
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{
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"enumerant" : "FPGALatencyControlINTEL",
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"value" : 6171,

‎include/spirv/unified1/spirv.cs

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@@ -587,7 +587,6 @@ public enum Decoration
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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ConduitKernelArgumentINTEL = 6175,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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FPGAKernelAttributesv2INTEL = 6161,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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GroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.h

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@@ -593,7 +593,6 @@ typedef enum SpvDecoration_ {
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SpvDecorationSingleElementVectorINTEL = 6085,
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SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
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SpvDecorationMediaBlockIOINTEL = 6140,
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SpvDecorationFPMaxErrorDecorationINTEL = 6170,
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SpvDecorationLatencyControlLabelINTEL = 6172,
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SpvDecorationLatencyControlConstraintINTEL = 6173,
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SpvDecorationConduitKernelArgumentINTEL = 6175,
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SpvCapabilityBFloat16ConversionINTEL = 6115,
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SpvCapabilitySplitBarrierINTEL = 6141,
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SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
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SpvCapabilityFPMaxErrorINTEL = 6169,
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SpvCapabilityFPGALatencyControlINTEL = 6171,
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SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
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SpvCapabilityGroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.hpp

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@@ -589,7 +589,6 @@ enum Decoration {
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DecorationSingleElementVectorINTEL = 6085,
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DecorationVectorComputeCallableFunctionINTEL = 6087,
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DecorationMediaBlockIOINTEL = 6140,
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DecorationFPMaxErrorDecorationINTEL = 6170,
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DecorationLatencyControlLabelINTEL = 6172,
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DecorationLatencyControlConstraintINTEL = 6173,
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DecorationConduitKernelArgumentINTEL = 6175,
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CapabilityBFloat16ConversionINTEL = 6115,
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CapabilitySplitBarrierINTEL = 6141,
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CapabilityFPGAKernelAttributesv2INTEL = 6161,
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CapabilityFPMaxErrorINTEL = 6169,
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CapabilityFPGALatencyControlINTEL = 6171,
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CapabilityFPGAArgumentInterfacesINTEL = 6174,
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CapabilityGroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.hpp11

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@@ -589,7 +589,6 @@ enum class Decoration : unsigned {
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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ConduitKernelArgumentINTEL = 6175,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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FPGAKernelAttributesv2INTEL = 6161,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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GroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.json

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@@ -615,7 +615,6 @@
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"SingleElementVectorINTEL": 6085,
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"VectorComputeCallableFunctionINTEL": 6087,
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"MediaBlockIOINTEL": 6140,
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"FPMaxErrorDecorationINTEL": 6170,
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"LatencyControlLabelINTEL": 6172,
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"LatencyControlConstraintINTEL": 6173,
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"ConduitKernelArgumentINTEL": 6175,
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"BFloat16ConversionINTEL": 6115,
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"SplitBarrierINTEL": 6141,
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"FPGAKernelAttributesv2INTEL": 6161,
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"FPMaxErrorINTEL": 6169,
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"FPGALatencyControlINTEL": 6171,
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"FPGAArgumentInterfacesINTEL": 6174,
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"GroupUniformArithmeticKHR": 6400

‎include/spirv/unified1/spirv.lua

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@@ -562,7 +562,6 @@ spv = {
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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ConduitKernelArgumentINTEL = 6175,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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FPGAKernelAttributesv2INTEL = 6161,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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GroupUniformArithmeticKHR = 6400,

‎include/spirv/unified1/spirv.py

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'SingleElementVectorINTEL' : 6085,
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'VectorComputeCallableFunctionINTEL' : 6087,
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'MediaBlockIOINTEL' : 6140,
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'FPMaxErrorDecorationINTEL' : 6170,
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'LatencyControlLabelINTEL' : 6172,
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'LatencyControlConstraintINTEL' : 6173,
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'ConduitKernelArgumentINTEL' : 6175,
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'BFloat16ConversionINTEL' : 6115,
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'SplitBarrierINTEL' : 6141,
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'FPGAKernelAttributesv2INTEL' : 6161,
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'FPMaxErrorINTEL' : 6169,
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'FPGALatencyControlINTEL' : 6171,
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'FPGAArgumentInterfacesINTEL' : 6174,
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'GroupUniformArithmeticKHR' : 6400,

‎include/spirv/unified1/spv.d

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@@ -590,7 +590,6 @@ enum Decoration : uint
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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ConduitKernelArgumentINTEL = 6175,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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FPGAKernelAttributesv2INTEL = 6161,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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GroupUniformArithmeticKHR = 6400,

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