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DmitryBushevDmitryBushev
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Implement SPV_INTEL_memory_access_aliasing extension (KhronosGroup#265)
Modify headers to include declarations of tokens described by this spec: intel/llvm#3426
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9 files changed

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-1
lines changed

9 files changed

+169
-1
lines changed

‎include/spirv/unified1/spirv.core.grammar.json

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7869,6 +7869,43 @@
78697869
"extensions" : [ "SPV_INTEL_unstructured_loop_controls" ],
78707870
"version" : "None"
78717871
},
7872+
{
7873+
"opname" : "OpAliasDomainDeclINTEL",
7874+
"class" : "@exclude",
7875+
"opcode" : 5911,
7876+
"operands" : [
7877+
{ "kind" : "IdResult"},
7878+
{ "kind" : "IdRef", "quantifier" : "?", "name" : "'Name'" }
7879+
],
7880+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
7881+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
7882+
"version" : "None"
7883+
},
7884+
{
7885+
"opname" : "OpAliasScopeDeclINTEL",
7886+
"class" : "@exclude",
7887+
"opcode" : 5912,
7888+
"operands" : [
7889+
{ "kind" : "IdResult"},
7890+
{ "kind" : "IdRef", "name" : "'Alias Domain'"},
7891+
{ "kind" : "IdRef", "quantifier" : "?", "name" : "'Name'" }
7892+
],
7893+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
7894+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
7895+
"version" : "None"
7896+
},
7897+
{
7898+
"opname" : "OpAliasScopeListDeclINTEL",
7899+
"class" : "@exclude",
7900+
"opcode" : 5913,
7901+
"operands" : [
7902+
{ "kind" : "IdResult"},
7903+
{ "kind" : "IdRef", "quantifier" : "*", "name" : "'AliasScope1, AliasScope2, ...'" }
7904+
],
7905+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
7906+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
7907+
"version" : "None"
7908+
},
78727909
{
78737910
"opname" : "OpFixedSqrtINTEL",
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"class" : "@exclude",
@@ -9090,6 +9127,26 @@
90909127
"capabilities" : [ "VulkanMemoryModel" ],
90919128
"extensions" : [ "SPV_KHR_vulkan_memory_model" ],
90929129
"version" : "1.5"
9130+
},
9131+
{
9132+
"enumerant" : "AliasScopeINTELMask",
9133+
"value" : "0x10000",
9134+
"parameters" : [
9135+
{ "kind" : "IdRef" }
9136+
],
9137+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
9138+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
9139+
"version" : "None"
9140+
},
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{
9142+
"enumerant" : "NoAliasINTELMask",
9143+
"parameters" : [
9144+
{ "kind" : "IdRef" }
9145+
],
9146+
"value" : "0x20000",
9147+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
9148+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
9149+
"version" : "None"
90939150
}
90949151
]
90959152
},
@@ -11579,6 +11636,24 @@
1157911636
"capabilities" : [ "LoopFuseINTEL" ],
1158011637
"version" : "None"
1158111638
},
11639+
{
11640+
"enumerant" : "AliasScopeINTEL",
11641+
"value" : 5914,
11642+
"parameters" : [
11643+
{ "kind" : "IdRef", "name" : "'Aliasing Scopes List'" }
11644+
],
11645+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
11646+
"version" : "None"
11647+
},
11648+
{
11649+
"enumerant" : "NoAliasINTEL",
11650+
"value" : 5915,
11651+
"parameters" : [
11652+
{ "kind" : "IdRef", "name" : "'Aliasing Scopes List'" }
11653+
],
11654+
"capabilities" : [ "MemoryAccessAliasingINTEL" ],
11655+
"version" : "None"
11656+
},
1158211657
{
1158311658
"enumerant" : "BufferLocationINTEL",
1158411659
"value" : 5921,
@@ -13677,6 +13752,12 @@
1367713752
"extensions" : [ "SPV_INTEL_loop_fuse" ],
1367813753
"version" : "None"
1367913754
},
13755+
{
13756+
"enumerant" : "MemoryAccessAliasingINTEL",
13757+
"value" : 5910,
13758+
"extensions" : [ "SPV_INTEL_memory_access_aliasing" ],
13759+
"version" : "None"
13760+
},
1368013761
{
1368113762
"enumerant" : "FPGABufferLocationINTEL",
1368213763
"value" : 5920,

‎include/spirv/unified1/spirv.cs

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -540,6 +540,8 @@ public enum Decoration
540540
PrefetchINTEL = 5902,
541541
StallEnableINTEL = 5905,
542542
FuseLoopsInFunctionINTEL = 5907,
543+
AliasScopeINTEL = 5914,
544+
NoAliasINTEL = 5915,
543545
BufferLocationINTEL = 5921,
544546
IOPipeStorageINTEL = 5944,
545547
FunctionFloatingPointModeINTEL = 6080,
@@ -802,6 +804,8 @@ public enum MemoryAccessShift
802804
MakePointerVisibleKHR = 4,
803805
NonPrivatePointer = 5,
804806
NonPrivatePointerKHR = 5,
807+
AliasScopeINTELMask = 16,
808+
NoAliasINTELMask = 17,
805809
}
806810

807811
public enum MemoryAccessMask
@@ -816,6 +820,8 @@ public enum MemoryAccessMask
816820
MakePointerVisibleKHR = 0x00000010,
817821
NonPrivatePointer = 0x00000020,
818822
NonPrivatePointerKHR = 0x00000020,
823+
AliasScopeINTELMask = 0x00010000,
824+
NoAliasINTELMask = 0x00020000,
819825
}
820826

821827
public enum Scope
@@ -1059,6 +1065,7 @@ public enum Capability
10591065
FPGAMemoryAccessesINTEL = 5898,
10601066
FPGAClusterAttributesINTEL = 5904,
10611067
LoopFuseINTEL = 5906,
1068+
MemoryAccessAliasingINTEL = 5910,
10621069
FPGABufferLocationINTEL = 5920,
10631070
ArbitraryPrecisionFixedPointINTEL = 5922,
10641071
USMStorageClassesINTEL = 5935,
@@ -1803,6 +1810,9 @@ public enum Op
18031810
OpArbitraryFloatPowRINTEL = 5881,
18041811
OpArbitraryFloatPowNINTEL = 5882,
18051812
OpLoopControlINTEL = 5887,
1813+
OpAliasDomainDeclINTEL = 5911,
1814+
OpAliasScopeDeclINTEL = 5912,
1815+
OpAliasScopeListDeclINTEL = 5913,
18061816
OpFixedSqrtINTEL = 5923,
18071817
OpFixedRecipINTEL = 5924,
18081818
OpFixedRsqrtINTEL = 5925,

‎include/spirv/unified1/spirv.h

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Original file line numberDiff line numberDiff line change
@@ -546,6 +546,8 @@ typedef enum SpvDecoration_ {
546546
SpvDecorationPrefetchINTEL = 5902,
547547
SpvDecorationStallEnableINTEL = 5905,
548548
SpvDecorationFuseLoopsInFunctionINTEL = 5907,
549+
SpvDecorationAliasScopeINTEL = 5914,
550+
SpvDecorationNoAliasINTEL = 5915,
549551
SpvDecorationBufferLocationINTEL = 5921,
550552
SpvDecorationIOPipeStorageINTEL = 5944,
551553
SpvDecorationFunctionFloatingPointModeINTEL = 6080,
@@ -804,6 +806,8 @@ typedef enum SpvMemoryAccessShift_ {
804806
SpvMemoryAccessMakePointerVisibleKHRShift = 4,
805807
SpvMemoryAccessNonPrivatePointerShift = 5,
806808
SpvMemoryAccessNonPrivatePointerKHRShift = 5,
809+
SpvMemoryAccessAliasScopeINTELMaskShift = 16,
810+
SpvMemoryAccessNoAliasINTELMaskShift = 17,
807811
SpvMemoryAccessMax = 0x7fffffff,
808812
} SpvMemoryAccessShift;
809813

@@ -818,6 +822,8 @@ typedef enum SpvMemoryAccessMask_ {
818822
SpvMemoryAccessMakePointerVisibleKHRMask = 0x00000010,
819823
SpvMemoryAccessNonPrivatePointerMask = 0x00000020,
820824
SpvMemoryAccessNonPrivatePointerKHRMask = 0x00000020,
825+
SpvMemoryAccessAliasScopeINTELMaskMask = 0x00010000,
826+
SpvMemoryAccessNoAliasINTELMaskMask = 0x00020000,
821827
} SpvMemoryAccessMask;
822828

823829
typedef enum SpvScope_ {
@@ -1059,6 +1065,7 @@ typedef enum SpvCapability_ {
10591065
SpvCapabilityFPGAMemoryAccessesINTEL = 5898,
10601066
SpvCapabilityFPGAClusterAttributesINTEL = 5904,
10611067
SpvCapabilityLoopFuseINTEL = 5906,
1068+
SpvCapabilityMemoryAccessAliasingINTEL = 5910,
10621069
SpvCapabilityFPGABufferLocationINTEL = 5920,
10631070
SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922,
10641071
SpvCapabilityUSMStorageClassesINTEL = 5935,
@@ -1801,6 +1808,9 @@ typedef enum SpvOp_ {
18011808
SpvOpArbitraryFloatPowRINTEL = 5881,
18021809
SpvOpArbitraryFloatPowNINTEL = 5882,
18031810
SpvOpLoopControlINTEL = 5887,
1811+
SpvOpAliasDomainDeclINTEL = 5911,
1812+
SpvOpAliasScopeDeclINTEL = 5912,
1813+
SpvOpAliasScopeListDeclINTEL = 5913,
18041814
SpvOpFixedSqrtINTEL = 5923,
18051815
SpvOpFixedRecipINTEL = 5924,
18061816
SpvOpFixedRsqrtINTEL = 5925,
@@ -2452,6 +2462,9 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
24522462
case SpvOpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
24532463
case SpvOpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
24542464
case SpvOpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
2465+
case SpvOpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
2466+
case SpvOpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
2467+
case SpvOpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
24552468
case SpvOpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
24562469
case SpvOpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
24572470
case SpvOpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;

‎include/spirv/unified1/spirv.hpp

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -542,6 +542,8 @@ enum Decoration {
542542
DecorationPrefetchINTEL = 5902,
543543
DecorationStallEnableINTEL = 5905,
544544
DecorationFuseLoopsInFunctionINTEL = 5907,
545+
DecorationAliasScopeINTEL = 5914,
546+
DecorationNoAliasINTEL = 5915,
545547
DecorationBufferLocationINTEL = 5921,
546548
DecorationIOPipeStorageINTEL = 5944,
547549
DecorationFunctionFloatingPointModeINTEL = 6080,
@@ -800,6 +802,8 @@ enum MemoryAccessShift {
800802
MemoryAccessMakePointerVisibleKHRShift = 4,
801803
MemoryAccessNonPrivatePointerShift = 5,
802804
MemoryAccessNonPrivatePointerKHRShift = 5,
805+
MemoryAccessAliasScopeINTELMaskShift = 16,
806+
MemoryAccessNoAliasINTELMaskShift = 17,
803807
MemoryAccessMax = 0x7fffffff,
804808
};
805809

@@ -814,6 +818,8 @@ enum MemoryAccessMask {
814818
MemoryAccessMakePointerVisibleKHRMask = 0x00000010,
815819
MemoryAccessNonPrivatePointerMask = 0x00000020,
816820
MemoryAccessNonPrivatePointerKHRMask = 0x00000020,
821+
MemoryAccessAliasScopeINTELMaskMask = 0x00010000,
822+
MemoryAccessNoAliasINTELMaskMask = 0x00020000,
817823
};
818824

819825
enum Scope {
@@ -1055,6 +1061,7 @@ enum Capability {
10551061
CapabilityFPGAMemoryAccessesINTEL = 5898,
10561062
CapabilityFPGAClusterAttributesINTEL = 5904,
10571063
CapabilityLoopFuseINTEL = 5906,
1064+
CapabilityMemoryAccessAliasingINTEL = 5910,
10581065
CapabilityFPGABufferLocationINTEL = 5920,
10591066
CapabilityArbitraryPrecisionFixedPointINTEL = 5922,
10601067
CapabilityUSMStorageClassesINTEL = 5935,
@@ -1797,6 +1804,9 @@ enum Op {
17971804
OpArbitraryFloatPowRINTEL = 5881,
17981805
OpArbitraryFloatPowNINTEL = 5882,
17991806
OpLoopControlINTEL = 5887,
1807+
OpAliasDomainDeclINTEL = 5911,
1808+
OpAliasScopeDeclINTEL = 5912,
1809+
OpAliasScopeListDeclINTEL = 5913,
18001810
OpFixedSqrtINTEL = 5923,
18011811
OpFixedRecipINTEL = 5924,
18021812
OpFixedRsqrtINTEL = 5925,
@@ -2448,6 +2458,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
24482458
case OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
24492459
case OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
24502460
case OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
2461+
case OpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
2462+
case OpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
2463+
case OpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
24512464
case OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
24522465
case OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
24532466
case OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;

‎include/spirv/unified1/spirv.hpp11

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -542,6 +542,8 @@ enum class Decoration : unsigned {
542542
PrefetchINTEL = 5902,
543543
StallEnableINTEL = 5905,
544544
FuseLoopsInFunctionINTEL = 5907,
545+
AliasScopeINTEL = 5914,
546+
NoAliasINTEL = 5915,
545547
BufferLocationINTEL = 5921,
546548
IOPipeStorageINTEL = 5944,
547549
FunctionFloatingPointModeINTEL = 6080,
@@ -800,6 +802,8 @@ enum class MemoryAccessShift : unsigned {
800802
MakePointerVisibleKHR = 4,
801803
NonPrivatePointer = 5,
802804
NonPrivatePointerKHR = 5,
805+
AliasScopeINTELMask = 16,
806+
NoAliasINTELMask = 17,
803807
Max = 0x7fffffff,
804808
};
805809

@@ -814,6 +818,8 @@ enum class MemoryAccessMask : unsigned {
814818
MakePointerVisibleKHR = 0x00000010,
815819
NonPrivatePointer = 0x00000020,
816820
NonPrivatePointerKHR = 0x00000020,
821+
AliasScopeINTELMask = 0x00010000,
822+
NoAliasINTELMask = 0x00020000,
817823
};
818824

819825
enum class Scope : unsigned {
@@ -1055,6 +1061,7 @@ enum class Capability : unsigned {
10551061
FPGAMemoryAccessesINTEL = 5898,
10561062
FPGAClusterAttributesINTEL = 5904,
10571063
LoopFuseINTEL = 5906,
1064+
MemoryAccessAliasingINTEL = 5910,
10581065
FPGABufferLocationINTEL = 5920,
10591066
ArbitraryPrecisionFixedPointINTEL = 5922,
10601067
USMStorageClassesINTEL = 5935,
@@ -1797,6 +1804,9 @@ enum class Op : unsigned {
17971804
OpArbitraryFloatPowRINTEL = 5881,
17981805
OpArbitraryFloatPowNINTEL = 5882,
17991806
OpLoopControlINTEL = 5887,
1807+
OpAliasDomainDeclINTEL = 5911,
1808+
OpAliasScopeDeclINTEL = 5912,
1809+
OpAliasScopeListDeclINTEL = 5913,
18001810
OpFixedSqrtINTEL = 5923,
18011811
OpFixedRecipINTEL = 5924,
18021812
OpFixedRsqrtINTEL = 5925,
@@ -2448,6 +2458,9 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
24482458
case Op::OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
24492459
case Op::OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
24502460
case Op::OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
2461+
case Op::OpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
2462+
case Op::OpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
2463+
case Op::OpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
24512464
case Op::OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
24522465
case Op::OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
24532466
case Op::OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;

‎include/spirv/unified1/spirv.json

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -568,6 +568,8 @@
568568
"PrefetchINTEL": 5902,
569569
"StallEnableINTEL": 5905,
570570
"FuseLoopsInFunctionINTEL": 5907,
571+
"AliasScopeINTEL": 5914,
572+
"NoAliasINTEL": 5915,
571573
"BufferLocationINTEL": 5921,
572574
"IOPipeStorageINTEL": 5944,
573575
"FunctionFloatingPointModeINTEL": 6080,
@@ -786,7 +788,9 @@
786788
"MakePointerVisible": 4,
787789
"MakePointerVisibleKHR": 4,
788790
"NonPrivatePointer": 5,
789-
"NonPrivatePointerKHR": 5
791+
"NonPrivatePointerKHR": 5,
792+
"AliasScopeINTELMask": 16,
793+
"NoAliasINTELMask": 17
790794
}
791795
},
792796
{
@@ -1039,6 +1043,7 @@
10391043
"FPGAMemoryAccessesINTEL": 5898,
10401044
"FPGAClusterAttributesINTEL": 5904,
10411045
"LoopFuseINTEL": 5906,
1046+
"MemoryAccessAliasingINTEL": 5910,
10421047
"FPGABufferLocationINTEL": 5920,
10431048
"ArbitraryPrecisionFixedPointINTEL": 5922,
10441049
"USMStorageClassesINTEL": 5935,
@@ -1792,6 +1797,9 @@
17921797
"OpArbitraryFloatPowRINTEL": 5881,
17931798
"OpArbitraryFloatPowNINTEL": 5882,
17941799
"OpLoopControlINTEL": 5887,
1800+
"OpAliasDomainDeclINTEL": 5911,
1801+
"OpAliasScopeDeclINTEL": 5912,
1802+
"OpAliasScopeListDeclINTEL": 5913,
17951803
"OpFixedSqrtINTEL": 5923,
17961804
"OpFixedRecipINTEL": 5924,
17971805
"OpFixedRsqrtINTEL": 5925,

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