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SPV_KHR_float_controls2 (KhronosGroup#409)
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10 files changed

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-4
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10 files changed

+107
-4
lines changed

‎include/spirv/unified1/spirv.bf

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -206,6 +206,7 @@ namespace Spv
206206
NumSIMDWorkitemsINTEL = 5896,
207207
SchedulerTargetFmaxMhzINTEL = 5903,
208208
MaximallyReconvergesKHR = 6023,
209+
FPFastMathDefault = 6028,
209210
StreamingInterfaceINTEL = 6154,
210211
RegisterMapInterfaceINTEL = 6160,
211212
NamedBarrierCountINTEL = 6417,
@@ -426,8 +427,11 @@ namespace Spv
426427
NSZ = 2,
427428
AllowRecip = 3,
428429
Fast = 4,
430+
AllowContract = 16,
429431
AllowContractFastINTEL = 16,
432+
AllowReassoc = 17,
430433
AllowReassocINTEL = 17,
434+
AllowTransform = 18,
431435
}
432436

433437
[AllowDuplicates, CRepr] public enum FPFastMathModeMask
@@ -438,8 +442,11 @@ namespace Spv
438442
NSZ = 0x00000004,
439443
AllowRecip = 0x00000008,
440444
Fast = 0x00000010,
445+
AllowContract = 0x00010000,
441446
AllowContractFastINTEL = 0x00010000,
447+
AllowReassoc = 0x00020000,
442448
AllowReassocINTEL = 0x00020000,
449+
AllowTransform = 0x00040000,
443450
}
444451

445452
[AllowDuplicates, CRepr] public enum FPRoundingMode
@@ -1198,6 +1205,7 @@ namespace Spv
11981205
CooperativeMatrixKHR = 6022,
11991206
BitInstructions = 6025,
12001207
GroupNonUniformRotateKHR = 6026,
1208+
FloatControls2 = 6029,
12011209
AtomicFloat32AddEXT = 6033,
12021210
AtomicFloat64AddEXT = 6034,
12031211
LongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.core.grammar.json

Lines changed: 37 additions & 3 deletions
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@@ -9989,16 +9989,34 @@
99899989
"value" : "0x0010",
99909990
"version" : "1.0"
99919991
},
9992+
{
9993+
"enumerant" : "AllowContract",
9994+
"value" : "0x10000",
9995+
"capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
9996+
"version" : "None"
9997+
},
99929998
{
99939999
"enumerant" : "AllowContractFastINTEL",
999410000
"value" : "0x10000",
9995-
"capabilities" : [ "FPFastMathModeINTEL" ],
10001+
"capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
10002+
"version" : "None"
10003+
},
10004+
{
10005+
"enumerant" : "AllowReassoc",
10006+
"value" : "0x20000",
10007+
"capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
999610008
"version" : "None"
999710009
},
999810010
{
999910011
"enumerant" : "AllowReassocINTEL",
1000010012
"value" : "0x20000",
10001-
"capabilities" : [ "FPFastMathModeINTEL" ],
10013+
"capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
10014+
"version" : "None"
10015+
},
10016+
{
10017+
"enumerant" : "AllowTransform",
10018+
"value" : "0x40000",
10019+
"capabilities" : [ "FloatControls2" ],
1000210020
"version" : "None"
1000310021
}
1000410022
]
@@ -11506,6 +11524,16 @@
1150611524
"extensions" : [ "SPV_KHR_maximal_reconvergence" ],
1150711525
"version" : "None"
1150811526
},
11527+
{
11528+
"enumerant" : "FPFastMathDefault",
11529+
"value" : 6028,
11530+
"parameters" : [
11531+
{ "kind" : "IdRef", "name" : "'Target Type'" },
11532+
{ "kind" : "IdRef", "name" : "'Fast-Math Mode'" }
11533+
],
11534+
"capabilities" : [ "FloatControls2" ],
11535+
"version" : "None"
11536+
},
1150911537
{
1151011538
"enumerant" : "StreamingInterfaceINTEL",
1151111539
"value" : 6154,
@@ -12940,7 +12968,7 @@
1294012968
{
1294112969
"enumerant" : "FPFastMathMode",
1294212970
"value" : 40,
12943-
"capabilities" : [ "Kernel" ],
12971+
"capabilities" : [ "Kernel", "FloatControls2" ],
1294412972
"parameters" : [
1294512973
{ "kind" : "FPFastMathMode", "name" : "'Fast-Math Mode'" }
1294612974
],
@@ -16269,6 +16297,12 @@
1626916297
"extensions" : [ "SPV_KHR_subgroup_rotate" ],
1627016298
"version" : "None"
1627116299
},
16300+
{
16301+
"enumerant" : "FloatControls2",
16302+
"value" : 6029,
16303+
"extensions" : [ "SPV_KHR_float_controls2" ],
16304+
"version" : "None"
16305+
},
1627216306
{
1627316307
"enumerant" : "AtomicFloat32AddEXT",
1627416308
"value" : 6033,

‎include/spirv/unified1/spirv.cs

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,7 @@ public enum ExecutionMode
205205
NumSIMDWorkitemsINTEL = 5896,
206206
SchedulerTargetFmaxMhzINTEL = 5903,
207207
MaximallyReconvergesKHR = 6023,
208+
FPFastMathDefault = 6028,
208209
StreamingInterfaceINTEL = 6154,
209210
RegisterMapInterfaceINTEL = 6160,
210211
NamedBarrierCountINTEL = 6417,
@@ -425,8 +426,11 @@ public enum FPFastMathModeShift
425426
NSZ = 2,
426427
AllowRecip = 3,
427428
Fast = 4,
429+
AllowContract = 16,
428430
AllowContractFastINTEL = 16,
431+
AllowReassoc = 17,
429432
AllowReassocINTEL = 17,
433+
AllowTransform = 18,
430434
}
431435

432436
public enum FPFastMathModeMask
@@ -437,8 +441,11 @@ public enum FPFastMathModeMask
437441
NSZ = 0x00000004,
438442
AllowRecip = 0x00000008,
439443
Fast = 0x00000010,
444+
AllowContract = 0x00010000,
440445
AllowContractFastINTEL = 0x00010000,
446+
AllowReassoc = 0x00020000,
441447
AllowReassocINTEL = 0x00020000,
448+
AllowTransform = 0x00040000,
442449
}
443450

444451
public enum FPRoundingMode
@@ -1197,6 +1204,7 @@ public enum Capability
11971204
CooperativeMatrixKHR = 6022,
11981205
BitInstructions = 6025,
11991206
GroupNonUniformRotateKHR = 6026,
1207+
FloatControls2 = 6029,
12001208
AtomicFloat32AddEXT = 6033,
12011209
AtomicFloat64AddEXT = 6034,
12021210
LongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.h

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Original file line numberDiff line numberDiff line change
@@ -213,6 +213,7 @@ typedef enum SpvExecutionMode_ {
213213
SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
214214
SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
215215
SpvExecutionModeMaximallyReconvergesKHR = 6023,
216+
SpvExecutionModeFPFastMathDefault = 6028,
216217
SpvExecutionModeStreamingInterfaceINTEL = 6154,
217218
SpvExecutionModeRegisterMapInterfaceINTEL = 6160,
218219
SpvExecutionModeNamedBarrierCountINTEL = 6417,
@@ -432,8 +433,11 @@ typedef enum SpvFPFastMathModeShift_ {
432433
SpvFPFastMathModeNSZShift = 2,
433434
SpvFPFastMathModeAllowRecipShift = 3,
434435
SpvFPFastMathModeFastShift = 4,
436+
SpvFPFastMathModeAllowContractShift = 16,
435437
SpvFPFastMathModeAllowContractFastINTELShift = 16,
438+
SpvFPFastMathModeAllowReassocShift = 17,
436439
SpvFPFastMathModeAllowReassocINTELShift = 17,
440+
SpvFPFastMathModeAllowTransformShift = 18,
437441
SpvFPFastMathModeMax = 0x7fffffff,
438442
} SpvFPFastMathModeShift;
439443

@@ -444,8 +448,11 @@ typedef enum SpvFPFastMathModeMask_ {
444448
SpvFPFastMathModeNSZMask = 0x00000004,
445449
SpvFPFastMathModeAllowRecipMask = 0x00000008,
446450
SpvFPFastMathModeFastMask = 0x00000010,
451+
SpvFPFastMathModeAllowContractMask = 0x00010000,
447452
SpvFPFastMathModeAllowContractFastINTELMask = 0x00010000,
453+
SpvFPFastMathModeAllowReassocMask = 0x00020000,
448454
SpvFPFastMathModeAllowReassocINTELMask = 0x00020000,
455+
SpvFPFastMathModeAllowTransformMask = 0x00040000,
449456
} SpvFPFastMathModeMask;
450457

451458
typedef enum SpvFPRoundingMode_ {
@@ -1197,6 +1204,7 @@ typedef enum SpvCapability_ {
11971204
SpvCapabilityCooperativeMatrixKHR = 6022,
11981205
SpvCapabilityBitInstructions = 6025,
11991206
SpvCapabilityGroupNonUniformRotateKHR = 6026,
1207+
SpvCapabilityFloatControls2 = 6029,
12001208
SpvCapabilityAtomicFloat32AddEXT = 6033,
12011209
SpvCapabilityAtomicFloat64AddEXT = 6034,
12021210
SpvCapabilityLongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.hpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -209,6 +209,7 @@ enum ExecutionMode {
209209
ExecutionModeNumSIMDWorkitemsINTEL = 5896,
210210
ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
211211
ExecutionModeMaximallyReconvergesKHR = 6023,
212+
ExecutionModeFPFastMathDefault = 6028,
212213
ExecutionModeStreamingInterfaceINTEL = 6154,
213214
ExecutionModeRegisterMapInterfaceINTEL = 6160,
214215
ExecutionModeNamedBarrierCountINTEL = 6417,
@@ -428,8 +429,11 @@ enum FPFastMathModeShift {
428429
FPFastMathModeNSZShift = 2,
429430
FPFastMathModeAllowRecipShift = 3,
430431
FPFastMathModeFastShift = 4,
432+
FPFastMathModeAllowContractShift = 16,
431433
FPFastMathModeAllowContractFastINTELShift = 16,
434+
FPFastMathModeAllowReassocShift = 17,
432435
FPFastMathModeAllowReassocINTELShift = 17,
436+
FPFastMathModeAllowTransformShift = 18,
433437
FPFastMathModeMax = 0x7fffffff,
434438
};
435439

@@ -440,8 +444,11 @@ enum FPFastMathModeMask {
440444
FPFastMathModeNSZMask = 0x00000004,
441445
FPFastMathModeAllowRecipMask = 0x00000008,
442446
FPFastMathModeFastMask = 0x00000010,
447+
FPFastMathModeAllowContractMask = 0x00010000,
443448
FPFastMathModeAllowContractFastINTELMask = 0x00010000,
449+
FPFastMathModeAllowReassocMask = 0x00020000,
444450
FPFastMathModeAllowReassocINTELMask = 0x00020000,
451+
FPFastMathModeAllowTransformMask = 0x00040000,
445452
};
446453

447454
enum FPRoundingMode {
@@ -1193,6 +1200,7 @@ enum Capability {
11931200
CapabilityCooperativeMatrixKHR = 6022,
11941201
CapabilityBitInstructions = 6025,
11951202
CapabilityGroupNonUniformRotateKHR = 6026,
1203+
CapabilityFloatControls2 = 6029,
11961204
CapabilityAtomicFloat32AddEXT = 6033,
11971205
CapabilityAtomicFloat64AddEXT = 6034,
11981206
CapabilityLongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.hpp11

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -209,6 +209,7 @@ enum class ExecutionMode : unsigned {
209209
NumSIMDWorkitemsINTEL = 5896,
210210
SchedulerTargetFmaxMhzINTEL = 5903,
211211
MaximallyReconvergesKHR = 6023,
212+
FPFastMathDefault = 6028,
212213
StreamingInterfaceINTEL = 6154,
213214
RegisterMapInterfaceINTEL = 6160,
214215
NamedBarrierCountINTEL = 6417,
@@ -428,8 +429,11 @@ enum class FPFastMathModeShift : unsigned {
428429
NSZ = 2,
429430
AllowRecip = 3,
430431
Fast = 4,
432+
AllowContract = 16,
431433
AllowContractFastINTEL = 16,
434+
AllowReassoc = 17,
432435
AllowReassocINTEL = 17,
436+
AllowTransform = 18,
433437
Max = 0x7fffffff,
434438
};
435439

@@ -440,8 +444,11 @@ enum class FPFastMathModeMask : unsigned {
440444
NSZ = 0x00000004,
441445
AllowRecip = 0x00000008,
442446
Fast = 0x00000010,
447+
AllowContract = 0x00010000,
443448
AllowContractFastINTEL = 0x00010000,
449+
AllowReassoc = 0x00020000,
444450
AllowReassocINTEL = 0x00020000,
451+
AllowTransform = 0x00040000,
445452
};
446453

447454
enum class FPRoundingMode : unsigned {
@@ -1193,6 +1200,7 @@ enum class Capability : unsigned {
11931200
CooperativeMatrixKHR = 6022,
11941201
BitInstructions = 6025,
11951202
GroupNonUniformRotateKHR = 6026,
1203+
FloatControls2 = 6029,
11961204
AtomicFloat32AddEXT = 6033,
11971205
AtomicFloat64AddEXT = 6034,
11981206
LongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.json

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -228,6 +228,7 @@
228228
"NumSIMDWorkitemsINTEL": 5896,
229229
"SchedulerTargetFmaxMhzINTEL": 5903,
230230
"MaximallyReconvergesKHR": 6023,
231+
"FPFastMathDefault": 6028,
231232
"StreamingInterfaceINTEL": 6154,
232233
"RegisterMapInterfaceINTEL": 6160,
233234
"NamedBarrierCountINTEL": 6417
@@ -450,8 +451,11 @@
450451
"NSZ": 2,
451452
"AllowRecip": 3,
452453
"Fast": 4,
454+
"AllowContract": 16,
453455
"AllowContractFastINTEL": 16,
454-
"AllowReassocINTEL": 17
456+
"AllowReassoc": 17,
457+
"AllowReassocINTEL": 17,
458+
"AllowTransform": 18
455459
}
456460
},
457461
{
@@ -1173,6 +1177,7 @@
11731177
"CooperativeMatrixKHR": 6022,
11741178
"BitInstructions": 6025,
11751179
"GroupNonUniformRotateKHR": 6026,
1180+
"FloatControls2": 6029,
11761181
"AtomicFloat32AddEXT": 6033,
11771182
"AtomicFloat64AddEXT": 6034,
11781183
"LongCompositesINTEL": 6089,

‎include/spirv/unified1/spirv.lua

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -196,6 +196,7 @@ spv = {
196196
NumSIMDWorkitemsINTEL = 5896,
197197
SchedulerTargetFmaxMhzINTEL = 5903,
198198
MaximallyReconvergesKHR = 6023,
199+
FPFastMathDefault = 6028,
199200
StreamingInterfaceINTEL = 6154,
200201
RegisterMapInterfaceINTEL = 6160,
201202
NamedBarrierCountINTEL = 6417,
@@ -406,8 +407,11 @@ spv = {
406407
NSZ = 2,
407408
AllowRecip = 3,
408409
Fast = 4,
410+
AllowContract = 16,
409411
AllowContractFastINTEL = 16,
412+
AllowReassoc = 17,
410413
AllowReassocINTEL = 17,
414+
AllowTransform = 18,
411415
},
412416

413417
FPFastMathModeMask = {
@@ -417,8 +421,11 @@ spv = {
417421
NSZ = 0x00000004,
418422
AllowRecip = 0x00000008,
419423
Fast = 0x00000010,
424+
AllowContract = 0x00010000,
420425
AllowContractFastINTEL = 0x00010000,
426+
AllowReassoc = 0x00020000,
421427
AllowReassocINTEL = 0x00020000,
428+
AllowTransform = 0x00040000,
422429
},
423430

424431
FPRoundingMode = {
@@ -1155,6 +1162,7 @@ spv = {
11551162
CooperativeMatrixKHR = 6022,
11561163
BitInstructions = 6025,
11571164
GroupNonUniformRotateKHR = 6026,
1165+
FloatControls2 = 6029,
11581166
AtomicFloat32AddEXT = 6033,
11591167
AtomicFloat64AddEXT = 6034,
11601168
LongCompositesINTEL = 6089,

‎include/spirv/unified1/spirv.py

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -196,6 +196,7 @@
196196
'NumSIMDWorkitemsINTEL' : 5896,
197197
'SchedulerTargetFmaxMhzINTEL' : 5903,
198198
'MaximallyReconvergesKHR' : 6023,
199+
'FPFastMathDefault' : 6028,
199200
'StreamingInterfaceINTEL' : 6154,
200201
'RegisterMapInterfaceINTEL' : 6160,
201202
'NamedBarrierCountINTEL' : 6417,
@@ -406,8 +407,11 @@
406407
'NSZ' : 2,
407408
'AllowRecip' : 3,
408409
'Fast' : 4,
410+
'AllowContract' : 16,
409411
'AllowContractFastINTEL' : 16,
412+
'AllowReassoc' : 17,
410413
'AllowReassocINTEL' : 17,
414+
'AllowTransform' : 18,
411415
},
412416

413417
'FPFastMathModeMask' : {
@@ -417,8 +421,11 @@
417421
'NSZ' : 0x00000004,
418422
'AllowRecip' : 0x00000008,
419423
'Fast' : 0x00000010,
424+
'AllowContract' : 0x00010000,
420425
'AllowContractFastINTEL' : 0x00010000,
426+
'AllowReassoc' : 0x00020000,
421427
'AllowReassocINTEL' : 0x00020000,
428+
'AllowTransform' : 0x00040000,
422429
},
423430

424431
'FPRoundingMode' : {
@@ -1155,6 +1162,7 @@
11551162
'CooperativeMatrixKHR' : 6022,
11561163
'BitInstructions' : 6025,
11571164
'GroupNonUniformRotateKHR' : 6026,
1165+
'FloatControls2' : 6029,
11581166
'AtomicFloat32AddEXT' : 6033,
11591167
'AtomicFloat64AddEXT' : 6034,
11601168
'LongCompositesINTEL' : 6089,

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