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Change token IDs for global_variable_fpga_decorations and global_variable_host_access (KhronosGroup#389)
Relates to the recent change in SPIRV-Registry: KhronosGroup/SPIRV-Registry#222
1 parent be3c81e commit cca08c6

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10 files changed

+85
-85
lines changed

10 files changed

+85
-85
lines changed

‎include/spirv/unified1/spirv.bf

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -603,9 +603,6 @@ namespace Spv
603603
SingleElementVectorINTEL = 6085,
604604
VectorComputeCallableFunctionINTEL = 6087,
605605
MediaBlockIOINTEL = 6140,
606-
InitModeINTEL = 6147,
607-
ImplementInRegisterMapINTEL = 6148,
608-
HostAccessINTEL = 6168,
609606
FPMaxErrorDecorationINTEL = 6170,
610607
LatencyControlLabelINTEL = 6172,
611608
LatencyControlConstraintINTEL = 6173,
@@ -618,6 +615,9 @@ namespace Spv
618615
MMHostInterfaceMaxBurstINTEL = 6181,
619616
MMHostInterfaceWaitRequestINTEL = 6182,
620617
StableKernelArgumentINTEL = 6183,
618+
HostAccessINTEL = 6188,
619+
InitModeINTEL = 6190,
620+
ImplementInRegisterMapINTEL = 6191,
621621
CacheControlLoadINTEL = 6442,
622622
CacheControlStoreINTEL = 6443,
623623
}
@@ -1203,12 +1203,12 @@ namespace Spv
12031203
DebugInfoModuleINTEL = 6114,
12041204
BFloat16ConversionINTEL = 6115,
12051205
SplitBarrierINTEL = 6141,
1206-
GlobalVariableFPGADecorationsINTEL = 6146,
12071206
FPGAKernelAttributesv2INTEL = 6161,
1208-
GlobalVariableHostAccessINTEL = 6167,
12091207
FPMaxErrorINTEL = 6169,
12101208
FPGALatencyControlINTEL = 6171,
12111209
FPGAArgumentInterfacesINTEL = 6174,
1210+
GlobalVariableHostAccessINTEL = 6187,
1211+
GlobalVariableFPGADecorationsINTEL = 6189,
12121212
GroupUniformArithmeticKHR = 6400,
12131213
CacheControlsINTEL = 6441,
12141214
}

‎include/spirv/unified1/spirv.core.grammar.json

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -13567,34 +13567,6 @@
1356713567
"capabilities" : [ "VectorComputeINTEL" ],
1356813568
"version" : "None"
1356913569
},
13570-
{
13571-
"enumerant" : "InitModeINTEL",
13572-
"value" : 6147,
13573-
"parameters": [
13574-
{ "kind" : "InitializationModeQualifier", "name" : "'Trigger'" }
13575-
],
13576-
"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
13577-
"version" : "None"
13578-
},
13579-
{
13580-
"enumerant" : "ImplementInRegisterMapINTEL",
13581-
"value" : 6148,
13582-
"parameters": [
13583-
{ "kind" : "LiteralInteger", "name" : "Value" }
13584-
],
13585-
"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
13586-
"version" : "None"
13587-
},
13588-
{
13589-
"enumerant" : "HostAccessINTEL",
13590-
"value" : 6168,
13591-
"parameters": [
13592-
{ "kind" : "HostAccessQualifier", "name" : "'Access'" },
13593-
{ "kind" : "LiteralString", "name" : "'Name'" }
13594-
],
13595-
"capabilities" : [ "GlobalVariableHostAccessINTEL" ],
13596-
"version" : "None"
13597-
},
1359813570
{
1359913571
"enumerant" : "FPMaxErrorDecorationINTEL",
1360013572
"value" : 6170,
@@ -13696,6 +13668,34 @@
1369613668
"capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
1369713669
"version" : "None"
1369813670
},
13671+
{
13672+
"enumerant" : "HostAccessINTEL",
13673+
"value" : 6188,
13674+
"parameters": [
13675+
{ "kind" : "HostAccessQualifier", "name" : "'Access'" },
13676+
{ "kind" : "LiteralString", "name" : "'Name'" }
13677+
],
13678+
"capabilities" : [ "GlobalVariableHostAccessINTEL" ],
13679+
"version" : "None"
13680+
},
13681+
{
13682+
"enumerant" : "InitModeINTEL",
13683+
"value" : 6190,
13684+
"parameters": [
13685+
{ "kind" : "InitializationModeQualifier", "name" : "'Trigger'" }
13686+
],
13687+
"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
13688+
"version" : "None"
13689+
},
13690+
{
13691+
"enumerant" : "ImplementInRegisterMapINTEL",
13692+
"value" : 6191,
13693+
"parameters": [
13694+
{ "kind" : "LiteralInteger", "name" : "Value" }
13695+
],
13696+
"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
13697+
"version" : "None"
13698+
},
1369913699
{
1370013700
"enumerant" : "CacheControlLoadINTEL",
1370113701
"value" : 6442,
@@ -16259,25 +16259,13 @@
1625916259
"extensions" : [ "SPV_INTEL_split_barrier" ],
1626016260
"version" : "None"
1626116261
},
16262-
{
16263-
"enumerant" : "GlobalVariableFPGADecorationsINTEL",
16264-
"value" : 6146,
16265-
"extensions": [ "SPV_INTEL_global_variable_fpga_decorations" ],
16266-
"version" : "None"
16267-
},
1626816262
{
1626916263
"enumerant" : "FPGAKernelAttributesv2INTEL",
1627016264
"value" : 6161,
1627116265
"capabilities" : [ "FPGAKernelAttributesINTEL" ],
1627216266
"extensions" : [ "SPV_INTEL_kernel_attributes" ],
1627316267
"version" : "None"
1627416268
},
16275-
{
16276-
"enumerant" : "GlobalVariableHostAccessINTEL",
16277-
"value" : 6167,
16278-
"extensions": [ "SPV_INTEL_global_variable_host_access" ],
16279-
"version" : "None"
16280-
},
1628116269
{
1628216270
"enumerant" : "FPMaxErrorINTEL",
1628316271
"value" : 6169,
@@ -16296,6 +16284,18 @@
1629616284
"extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
1629716285
"version" : "None"
1629816286
},
16287+
{
16288+
"enumerant" : "GlobalVariableHostAccessINTEL",
16289+
"value" : 6187,
16290+
"extensions": [ "SPV_INTEL_global_variable_host_access" ],
16291+
"version" : "None"
16292+
},
16293+
{
16294+
"enumerant" : "GlobalVariableFPGADecorationsINTEL",
16295+
"value" : 6189,
16296+
"extensions": [ "SPV_INTEL_global_variable_fpga_decorations" ],
16297+
"version" : "None"
16298+
},
1629916299
{
1630016300
"enumerant" : "GroupUniformArithmeticKHR",
1630116301
"value" : 6400,

‎include/spirv/unified1/spirv.cs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -602,9 +602,6 @@ public enum Decoration
602602
SingleElementVectorINTEL = 6085,
603603
VectorComputeCallableFunctionINTEL = 6087,
604604
MediaBlockIOINTEL = 6140,
605-
InitModeINTEL = 6147,
606-
ImplementInRegisterMapINTEL = 6148,
607-
HostAccessINTEL = 6168,
608605
FPMaxErrorDecorationINTEL = 6170,
609606
LatencyControlLabelINTEL = 6172,
610607
LatencyControlConstraintINTEL = 6173,
@@ -617,6 +614,9 @@ public enum Decoration
617614
MMHostInterfaceMaxBurstINTEL = 6181,
618615
MMHostInterfaceWaitRequestINTEL = 6182,
619616
StableKernelArgumentINTEL = 6183,
617+
HostAccessINTEL = 6188,
618+
InitModeINTEL = 6190,
619+
ImplementInRegisterMapINTEL = 6191,
620620
CacheControlLoadINTEL = 6442,
621621
CacheControlStoreINTEL = 6443,
622622
}
@@ -1202,12 +1202,12 @@ public enum Capability
12021202
DebugInfoModuleINTEL = 6114,
12031203
BFloat16ConversionINTEL = 6115,
12041204
SplitBarrierINTEL = 6141,
1205-
GlobalVariableFPGADecorationsINTEL = 6146,
12061205
FPGAKernelAttributesv2INTEL = 6161,
1207-
GlobalVariableHostAccessINTEL = 6167,
12081206
FPMaxErrorINTEL = 6169,
12091207
FPGALatencyControlINTEL = 6171,
12101208
FPGAArgumentInterfacesINTEL = 6174,
1209+
GlobalVariableHostAccessINTEL = 6187,
1210+
GlobalVariableFPGADecorationsINTEL = 6189,
12111211
GroupUniformArithmeticKHR = 6400,
12121212
CacheControlsINTEL = 6441,
12131213
}

‎include/spirv/unified1/spirv.h

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -608,9 +608,6 @@ typedef enum SpvDecoration_ {
608608
SpvDecorationSingleElementVectorINTEL = 6085,
609609
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
610610
SpvDecorationMediaBlockIOINTEL = 6140,
611-
SpvDecorationInitModeINTEL = 6147,
612-
SpvDecorationImplementInRegisterMapINTEL = 6148,
613-
SpvDecorationHostAccessINTEL = 6168,
614611
SpvDecorationFPMaxErrorDecorationINTEL = 6170,
615612
SpvDecorationLatencyControlLabelINTEL = 6172,
616613
SpvDecorationLatencyControlConstraintINTEL = 6173,
@@ -623,6 +620,9 @@ typedef enum SpvDecoration_ {
623620
SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181,
624621
SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182,
625622
SpvDecorationStableKernelArgumentINTEL = 6183,
623+
SpvDecorationHostAccessINTEL = 6188,
624+
SpvDecorationInitModeINTEL = 6190,
625+
SpvDecorationImplementInRegisterMapINTEL = 6191,
626626
SpvDecorationCacheControlLoadINTEL = 6442,
627627
SpvDecorationCacheControlStoreINTEL = 6443,
628628
SpvDecorationMax = 0x7fffffff,
@@ -1202,12 +1202,12 @@ typedef enum SpvCapability_ {
12021202
SpvCapabilityDebugInfoModuleINTEL = 6114,
12031203
SpvCapabilityBFloat16ConversionINTEL = 6115,
12041204
SpvCapabilitySplitBarrierINTEL = 6141,
1205-
SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6146,
12061205
SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
1207-
SpvCapabilityGlobalVariableHostAccessINTEL = 6167,
12081206
SpvCapabilityFPMaxErrorINTEL = 6169,
12091207
SpvCapabilityFPGALatencyControlINTEL = 6171,
12101208
SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
1209+
SpvCapabilityGlobalVariableHostAccessINTEL = 6187,
1210+
SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189,
12111211
SpvCapabilityGroupUniformArithmeticKHR = 6400,
12121212
SpvCapabilityCacheControlsINTEL = 6441,
12131213
SpvCapabilityMax = 0x7fffffff,

‎include/spirv/unified1/spirv.hpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -604,9 +604,6 @@ enum Decoration {
604604
DecorationSingleElementVectorINTEL = 6085,
605605
DecorationVectorComputeCallableFunctionINTEL = 6087,
606606
DecorationMediaBlockIOINTEL = 6140,
607-
DecorationInitModeINTEL = 6147,
608-
DecorationImplementInRegisterMapINTEL = 6148,
609-
DecorationHostAccessINTEL = 6168,
610607
DecorationFPMaxErrorDecorationINTEL = 6170,
611608
DecorationLatencyControlLabelINTEL = 6172,
612609
DecorationLatencyControlConstraintINTEL = 6173,
@@ -619,6 +616,9 @@ enum Decoration {
619616
DecorationMMHostInterfaceMaxBurstINTEL = 6181,
620617
DecorationMMHostInterfaceWaitRequestINTEL = 6182,
621618
DecorationStableKernelArgumentINTEL = 6183,
619+
DecorationHostAccessINTEL = 6188,
620+
DecorationInitModeINTEL = 6190,
621+
DecorationImplementInRegisterMapINTEL = 6191,
622622
DecorationCacheControlLoadINTEL = 6442,
623623
DecorationCacheControlStoreINTEL = 6443,
624624
DecorationMax = 0x7fffffff,
@@ -1198,12 +1198,12 @@ enum Capability {
11981198
CapabilityDebugInfoModuleINTEL = 6114,
11991199
CapabilityBFloat16ConversionINTEL = 6115,
12001200
CapabilitySplitBarrierINTEL = 6141,
1201-
CapabilityGlobalVariableFPGADecorationsINTEL = 6146,
12021201
CapabilityFPGAKernelAttributesv2INTEL = 6161,
1203-
CapabilityGlobalVariableHostAccessINTEL = 6167,
12041202
CapabilityFPMaxErrorINTEL = 6169,
12051203
CapabilityFPGALatencyControlINTEL = 6171,
12061204
CapabilityFPGAArgumentInterfacesINTEL = 6174,
1205+
CapabilityGlobalVariableHostAccessINTEL = 6187,
1206+
CapabilityGlobalVariableFPGADecorationsINTEL = 6189,
12071207
CapabilityGroupUniformArithmeticKHR = 6400,
12081208
CapabilityCacheControlsINTEL = 6441,
12091209
CapabilityMax = 0x7fffffff,

‎include/spirv/unified1/spirv.hpp11

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -604,9 +604,6 @@ enum class Decoration : unsigned {
604604
SingleElementVectorINTEL = 6085,
605605
VectorComputeCallableFunctionINTEL = 6087,
606606
MediaBlockIOINTEL = 6140,
607-
InitModeINTEL = 6147,
608-
ImplementInRegisterMapINTEL = 6148,
609-
HostAccessINTEL = 6168,
610607
FPMaxErrorDecorationINTEL = 6170,
611608
LatencyControlLabelINTEL = 6172,
612609
LatencyControlConstraintINTEL = 6173,
@@ -619,6 +616,9 @@ enum class Decoration : unsigned {
619616
MMHostInterfaceMaxBurstINTEL = 6181,
620617
MMHostInterfaceWaitRequestINTEL = 6182,
621618
StableKernelArgumentINTEL = 6183,
619+
HostAccessINTEL = 6188,
620+
InitModeINTEL = 6190,
621+
ImplementInRegisterMapINTEL = 6191,
622622
CacheControlLoadINTEL = 6442,
623623
CacheControlStoreINTEL = 6443,
624624
Max = 0x7fffffff,
@@ -1198,12 +1198,12 @@ enum class Capability : unsigned {
11981198
DebugInfoModuleINTEL = 6114,
11991199
BFloat16ConversionINTEL = 6115,
12001200
SplitBarrierINTEL = 6141,
1201-
GlobalVariableFPGADecorationsINTEL = 6146,
12021201
FPGAKernelAttributesv2INTEL = 6161,
1203-
GlobalVariableHostAccessINTEL = 6167,
12041202
FPMaxErrorINTEL = 6169,
12051203
FPGALatencyControlINTEL = 6171,
12061204
FPGAArgumentInterfacesINTEL = 6174,
1205+
GlobalVariableHostAccessINTEL = 6187,
1206+
GlobalVariableFPGADecorationsINTEL = 6189,
12071207
GroupUniformArithmeticKHR = 6400,
12081208
CacheControlsINTEL = 6441,
12091209
Max = 0x7fffffff,

‎include/spirv/unified1/spirv.json

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -630,9 +630,6 @@
630630
"SingleElementVectorINTEL": 6085,
631631
"VectorComputeCallableFunctionINTEL": 6087,
632632
"MediaBlockIOINTEL": 6140,
633-
"InitModeINTEL": 6147,
634-
"ImplementInRegisterMapINTEL": 6148,
635-
"HostAccessINTEL": 6168,
636633
"FPMaxErrorDecorationINTEL": 6170,
637634
"LatencyControlLabelINTEL": 6172,
638635
"LatencyControlConstraintINTEL": 6173,
@@ -645,6 +642,9 @@
645642
"MMHostInterfaceMaxBurstINTEL": 6181,
646643
"MMHostInterfaceWaitRequestINTEL": 6182,
647644
"StableKernelArgumentINTEL": 6183,
645+
"HostAccessINTEL": 6188,
646+
"InitModeINTEL": 6190,
647+
"ImplementInRegisterMapINTEL": 6191,
648648
"CacheControlLoadINTEL": 6442,
649649
"CacheControlStoreINTEL": 6443
650650
}
@@ -1178,12 +1178,12 @@
11781178
"DebugInfoModuleINTEL": 6114,
11791179
"BFloat16ConversionINTEL": 6115,
11801180
"SplitBarrierINTEL": 6141,
1181-
"GlobalVariableFPGADecorationsINTEL": 6146,
11821181
"FPGAKernelAttributesv2INTEL": 6161,
1183-
"GlobalVariableHostAccessINTEL": 6167,
11841182
"FPMaxErrorINTEL": 6169,
11851183
"FPGALatencyControlINTEL": 6171,
11861184
"FPGAArgumentInterfacesINTEL": 6174,
1185+
"GlobalVariableHostAccessINTEL": 6187,
1186+
"GlobalVariableFPGADecorationsINTEL": 6189,
11871187
"GroupUniformArithmeticKHR": 6400,
11881188
"CacheControlsINTEL": 6441
11891189
}

‎include/spirv/unified1/spirv.lua

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -577,9 +577,6 @@ spv = {
577577
SingleElementVectorINTEL = 6085,
578578
VectorComputeCallableFunctionINTEL = 6087,
579579
MediaBlockIOINTEL = 6140,
580-
InitModeINTEL = 6147,
581-
ImplementInRegisterMapINTEL = 6148,
582-
HostAccessINTEL = 6168,
583580
FPMaxErrorDecorationINTEL = 6170,
584581
LatencyControlLabelINTEL = 6172,
585582
LatencyControlConstraintINTEL = 6173,
@@ -592,6 +589,9 @@ spv = {
592589
MMHostInterfaceMaxBurstINTEL = 6181,
593590
MMHostInterfaceWaitRequestINTEL = 6182,
594591
StableKernelArgumentINTEL = 6183,
592+
HostAccessINTEL = 6188,
593+
InitModeINTEL = 6190,
594+
ImplementInRegisterMapINTEL = 6191,
595595
CacheControlLoadINTEL = 6442,
596596
CacheControlStoreINTEL = 6443,
597597
},
@@ -1160,12 +1160,12 @@ spv = {
11601160
DebugInfoModuleINTEL = 6114,
11611161
BFloat16ConversionINTEL = 6115,
11621162
SplitBarrierINTEL = 6141,
1163-
GlobalVariableFPGADecorationsINTEL = 6146,
11641163
FPGAKernelAttributesv2INTEL = 6161,
1165-
GlobalVariableHostAccessINTEL = 6167,
11661164
FPMaxErrorINTEL = 6169,
11671165
FPGALatencyControlINTEL = 6171,
11681166
FPGAArgumentInterfacesINTEL = 6174,
1167+
GlobalVariableHostAccessINTEL = 6187,
1168+
GlobalVariableFPGADecorationsINTEL = 6189,
11691169
GroupUniformArithmeticKHR = 6400,
11701170
CacheControlsINTEL = 6441,
11711171
},

‎include/spirv/unified1/spirv.py

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -577,9 +577,6 @@
577577
'SingleElementVectorINTEL' : 6085,
578578
'VectorComputeCallableFunctionINTEL' : 6087,
579579
'MediaBlockIOINTEL' : 6140,
580-
'InitModeINTEL' : 6147,
581-
'ImplementInRegisterMapINTEL' : 6148,
582-
'HostAccessINTEL' : 6168,
583580
'FPMaxErrorDecorationINTEL' : 6170,
584581
'LatencyControlLabelINTEL' : 6172,
585582
'LatencyControlConstraintINTEL' : 6173,
@@ -592,6 +589,9 @@
592589
'MMHostInterfaceMaxBurstINTEL' : 6181,
593590
'MMHostInterfaceWaitRequestINTEL' : 6182,
594591
'StableKernelArgumentINTEL' : 6183,
592+
'HostAccessINTEL' : 6188,
593+
'InitModeINTEL' : 6190,
594+
'ImplementInRegisterMapINTEL' : 6191,
595595
'CacheControlLoadINTEL' : 6442,
596596
'CacheControlStoreINTEL' : 6443,
597597
},
@@ -1160,12 +1160,12 @@
11601160
'DebugInfoModuleINTEL' : 6114,
11611161
'BFloat16ConversionINTEL' : 6115,
11621162
'SplitBarrierINTEL' : 6141,
1163-
'GlobalVariableFPGADecorationsINTEL' : 6146,
11641163
'FPGAKernelAttributesv2INTEL' : 6161,
1165-
'GlobalVariableHostAccessINTEL' : 6167,
11661164
'FPMaxErrorINTEL' : 6169,
11671165
'FPGALatencyControlINTEL' : 6171,
11681166
'FPGAArgumentInterfacesINTEL' : 6174,
1167+
'GlobalVariableHostAccessINTEL' : 6187,
1168+
'GlobalVariableFPGADecorationsINTEL' : 6189,
11691169
'GroupUniformArithmeticKHR' : 6400,
11701170
'CacheControlsINTEL' : 6441,
11711171
},

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