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asudarsaasudarsa
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Merge remote-tracking branch 'real-origin/main' into asudarsa/add_fp_max_error_support
2 parents f46e295 + 1feaf44 commit d9d7078

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‎include/spirv/unified1/spirv.bf

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,7 @@ namespace Spv
193193
NumSIMDWorkitemsINTEL = 5896,
194194
SchedulerTargetFmaxMhzINTEL = 5903,
195195
StreamingInterfaceINTEL = 6154,
196+
RegisterMapInterfaceINTEL = 6160,
196197
NamedBarrierCountINTEL = 6417,
197198
}
198199

@@ -507,6 +508,8 @@ namespace Spv
507508
MaxByteOffsetId = 47,
508509
NoSignedWrap = 4469,
509510
NoUnsignedWrap = 4470,
511+
WeightTextureQCOM = 4487,
512+
BlockMatchTextureQCOM = 4488,
510513
ExplicitInterpAMD = 4999,
511514
OverrideCoverageNV = 5248,
512515
PassthroughNV = 5250,
@@ -576,6 +579,8 @@ namespace Spv
576579
VectorComputeCallableFunctionINTEL = 6087,
577580
MediaBlockIOINTEL = 6140,
578581
FPMaxErrorINTEL = 6170,
582+
LatencyControlLabelINTEL = 6172,
583+
LatencyControlConstraintINTEL = 6173,
579584
ConduitKernelArgumentINTEL = 6175,
580585
RegisterMapKernelArgumentINTEL = 6176,
581586
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1020,6 +1025,9 @@ namespace Spv
10201025
RayQueryKHR = 4472,
10211026
RayTraversalPrimitiveCullingKHR = 4478,
10221027
RayTracingKHR = 4479,
1028+
TextureSampleWeightedQCOM = 4484,
1029+
TextureBoxFilterQCOM = 4485,
1030+
TextureBlockMatchQCOM = 4486,
10231031
Float16ImageAMD = 5008,
10241032
ImageGatherBiasLodAMD = 5009,
10251033
FragmentMaskAMD = 5010,
@@ -1147,8 +1155,11 @@ namespace Spv
11471155
OptNoneINTEL = 6094,
11481156
AtomicFloat16AddEXT = 6095,
11491157
DebugInfoModuleINTEL = 6114,
1158+
BFloat16ConversionINTEL = 6115,
11501159
SplitBarrierINTEL = 6141,
1160+
FPGAKernelAttributesv2INTEL = 6161,
11511161
FPMaxErrorDecorationINTEL = 6169,
1162+
FPGALatencyControlINTEL = 6171,
11521163
FPGAArgumentInterfacesINTEL = 6174,
11531164
GroupUniformArithmeticKHR = 6400,
11541165
}
@@ -1636,6 +1647,10 @@ namespace Spv
16361647
OpRayQueryConfirmIntersectionKHR = 4476,
16371648
OpRayQueryProceedKHR = 4477,
16381649
OpRayQueryGetIntersectionTypeKHR = 4479,
1650+
OpImageSampleWeightedQCOM = 4480,
1651+
OpImageBoxFilterQCOM = 4481,
1652+
OpImageBlockMatchSSDQCOM = 4482,
1653+
OpImageBlockMatchSADQCOM = 4483,
16391654
OpGroupIAddNonUniformAMD = 5000,
16401655
OpGroupFAddNonUniformAMD = 5001,
16411656
OpGroupFMinNonUniformAMD = 5002,
@@ -1953,6 +1968,8 @@ namespace Spv
19531968
OpTypeStructContinuedINTEL = 6090,
19541969
OpConstantCompositeContinuedINTEL = 6091,
19551970
OpSpecConstantCompositeContinuedINTEL = 6092,
1971+
OpConvertFToBF16INTEL = 6116,
1972+
OpConvertBF16ToFINTEL = 6117,
19561973
OpControlBarrierArriveINTEL = 6142,
19571974
OpControlBarrierWaitINTEL = 6143,
19581975
OpGroupIMulKHR = 6401,

‎include/spirv/unified1/spirv.core.grammar.json

Lines changed: 162 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4592,6 +4592,66 @@
45924592
"extensions" : [ "SPV_KHR_ray_query" ],
45934593
"version" : "None"
45944594
},
4595+
{
4596+
"opname" : "OpImageSampleWeightedQCOM",
4597+
"class" : "Image",
4598+
"opcode" : 4480,
4599+
"operands" : [
4600+
{ "kind" : "IdResultType" },
4601+
{ "kind" : "IdResult" },
4602+
{ "kind" : "IdRef", "name" : "'Texture'" },
4603+
{ "kind" : "IdRef", "name" : "'Coordinates'" },
4604+
{ "kind" : "IdRef", "name" : "'Weights'" }
4605+
],
4606+
"capabilities" : [ "TextureSampleWeightedQCOM" ],
4607+
"version" : "None"
4608+
},
4609+
{
4610+
"opname" : "OpImageBoxFilterQCOM",
4611+
"class" : "Image",
4612+
"opcode" : 4481,
4613+
"operands" : [
4614+
{ "kind" : "IdResultType" },
4615+
{ "kind" : "IdResult" },
4616+
{ "kind" : "IdRef", "name" : "'Texture'" },
4617+
{ "kind" : "IdRef", "name" : "'Coordinates'" },
4618+
{ "kind" : "IdRef", "name" : "'Box Size'" }
4619+
],
4620+
"capabilities" : [ "TextureBoxFilterQCOM" ],
4621+
"version" : "None"
4622+
},
4623+
{
4624+
"opname" : "OpImageBlockMatchSSDQCOM",
4625+
"class" : "Image",
4626+
"opcode" : 4482,
4627+
"operands" : [
4628+
{ "kind" : "IdResultType" },
4629+
{ "kind" : "IdResult" },
4630+
{ "kind" : "IdRef", "name" : "'Target'" },
4631+
{ "kind" : "IdRef", "name" : "'Target Coordinates'" },
4632+
{ "kind" : "IdRef", "name" : "'Reference'" },
4633+
{ "kind" : "IdRef", "name" : "'Reference Coordinates'" },
4634+
{ "kind" : "IdRef", "name" : "'Block Size'" }
4635+
],
4636+
"capabilities" : [ "TextureBlockMatchQCOM" ],
4637+
"version" : "None"
4638+
},
4639+
{
4640+
"opname" : "OpImageBlockMatchSADQCOM",
4641+
"class" : "Image",
4642+
"opcode" : 4483,
4643+
"operands" : [
4644+
{ "kind" : "IdResultType" },
4645+
{ "kind" : "IdResult" },
4646+
{ "kind" : "IdRef", "name" : "'Target'" },
4647+
{ "kind" : "IdRef", "name" : "'Target Coordinates'" },
4648+
{ "kind" : "IdRef", "name" : "'Reference'" },
4649+
{ "kind" : "IdRef", "name" : "'Reference Coordinates'" },
4650+
{ "kind" : "IdRef", "name" : "'Block Size'" }
4651+
],
4652+
"capabilities" : [ "TextureBlockMatchQCOM" ],
4653+
"version" : "None"
4654+
},
45954655
{
45964656
"opname" : "OpGroupIAddNonUniformAMD",
45974657
"class" : "Group",
@@ -9043,6 +9103,30 @@
90439103
"capabilities" : [ "LongConstantCompositeINTEL" ],
90449104
"version" : "None"
90459105
},
9106+
{
9107+
"opname" : "OpConvertFToBF16INTEL",
9108+
"class" : "Conversion",
9109+
"opcode" : 6116,
9110+
"operands" : [
9111+
{ "kind" : "IdResultType" },
9112+
{ "kind" : "IdResult" },
9113+
{ "kind" : "IdRef", "name" : "'Float Value'" }
9114+
],
9115+
"capabilities" : [ "BFloat16ConversionINTEL" ],
9116+
"version" : "None"
9117+
},
9118+
{
9119+
"opname" : "OpConvertBF16ToFINTEL",
9120+
"class" : "Conversion",
9121+
"opcode" : 6117,
9122+
"operands" : [
9123+
{ "kind" : "IdResultType" },
9124+
{ "kind" : "IdResult" },
9125+
{ "kind" : "IdRef", "name" : "'BFloat16 Value'" }
9126+
],
9127+
"capabilities" : [ "BFloat16ConversionINTEL" ],
9128+
"version" : "None"
9129+
},
90469130
{
90479131
"opname" : "OpControlBarrierArriveINTEL",
90489132
"class" : "Barrier",
@@ -10715,6 +10799,15 @@
1071510799
"capabilities" : [ "FPGAKernelAttributesINTEL" ],
1071610800
"version" : "None"
1071710801
},
10802+
{
10803+
"enumerant" : "RegisterMapInterfaceINTEL",
10804+
"value" : 6160,
10805+
"parameters" : [
10806+
{ "kind" : "LiteralInteger", "name" : "'WaitForDoneWrite'" }
10807+
],
10808+
"capabilities" : [ "FPGAKernelAttributesv2INTEL" ],
10809+
"version" : "None"
10810+
},
1071810811
{
1071910812
"enumerant" : "NamedBarrierCountINTEL",
1072010813
"value" : 6417,
@@ -11986,6 +12079,18 @@
1198612079
"extensions" : [ "SPV_KHR_no_integer_wrap_decoration" ],
1198712080
"version" : "1.4"
1198812081
},
12082+
{
12083+
"enumerant" : "WeightTextureQCOM",
12084+
"value" : 4487,
12085+
"extensions" : [ "SPV_QCOM_image_processing" ],
12086+
"version" : "None"
12087+
},
12088+
{
12089+
"enumerant" : "BlockMatchTextureQCOM",
12090+
"value" : 4488,
12091+
"extensions" : [ "SPV_QCOM_image_processing" ],
12092+
"version" : "None"
12093+
},
1198912094
{
1199012095
"enumerant" : "ExplicitInterpAMD",
1199112096
"value" : 4999,
@@ -12523,6 +12628,26 @@
1252312628
"capabilities" : [ "FPMaxErrorDecorationINTEL" ],
1252412629
"version" : "None"
1252512630
},
12631+
{
12632+
"enumerant" : "LatencyControlLabelINTEL",
12633+
"value" : 6172,
12634+
"parameters" : [
12635+
{ "kind" : "LiteralInteger", "name" : "'Latency Label'" }
12636+
],
12637+
"capabilities" : [ "FPGALatencyControlINTEL" ],
12638+
"version" : "None"
12639+
},
12640+
{
12641+
"enumerant" : "LatencyControlConstraintINTEL",
12642+
"value" : 6173,
12643+
"parameters" : [
12644+
{ "kind" : "LiteralInteger", "name" : "'Relative To'" },
12645+
{ "kind" : "LiteralInteger", "name" : "'Control Type'" },
12646+
{ "kind" : "LiteralInteger", "name" : "'Relative Cycle'" }
12647+
],
12648+
"capabilities" : [ "FPGALatencyControlINTEL" ],
12649+
"version" : "None"
12650+
},
1252612651
{
1252712652
"enumerant" : "ConduitKernelArgumentINTEL",
1252812653
"value" : 6175,
@@ -14088,6 +14213,24 @@
1408814213
"extensions" : [ "SPV_KHR_ray_tracing" ],
1408914214
"version" : "None"
1409014215
},
14216+
{
14217+
"enumerant" : "TextureSampleWeightedQCOM",
14218+
"value" : 4484,
14219+
"extensions" : [ "SPV_QCOM_image_processing" ],
14220+
"version" : "None"
14221+
},
14222+
{
14223+
"enumerant" : "TextureBoxFilterQCOM",
14224+
"value" : 4485,
14225+
"extensions" : [ "SPV_QCOM_image_processing" ],
14226+
"version" : "None"
14227+
},
14228+
{
14229+
"enumerant" : "TextureBlockMatchQCOM",
14230+
"value" : 4486,
14231+
"extensions" : [ "SPV_QCOM_image_processing" ],
14232+
"version" : "None"
14233+
},
1409114234
{
1409214235
"enumerant" : "Float16ImageAMD",
1409314236
"value" : 5008,
@@ -14893,18 +15036,37 @@
1489315036
"extensions" : [ "SPV_INTEL_debug_module" ],
1489415037
"version" : "None"
1489515038
},
15039+
{
15040+
"enumerant" : "BFloat16ConversionINTEL",
15041+
"value" : 6115,
15042+
"extensions" : [ "SPV_INTEL_bfloat16_conversion" ],
15043+
"version" : "None"
15044+
},
1489615045
{
1489715046
"enumerant" : "SplitBarrierINTEL",
1489815047
"value" : 6141,
1489915048
"extensions" : [ "SPV_INTEL_split_barrier" ],
1490015049
"version" : "None"
1490115050
},
15051+
{
15052+
"enumerant" : "FPGAKernelAttributesv2INTEL",
15053+
"value" : 6161,
15054+
"capabilities" : [ "FPGAKernelAttributesINTEL" ],
15055+
"extensions" : [ "SPV_INTEL_kernel_attributes" ],
15056+
"version" : "None"
15057+
},
1490215058
{
1490315059
"enumerant" : "FPMaxErrorDecorationINTEL",
1490415060
"value" : 6169,
1490515061
"extensions" : [ "SPV_INTEL_fp_max_error" ],
1490615062
"version" : "None"
1490715063
},
15064+
{
15065+
"enumerant" : "FPGALatencyControlINTEL",
15066+
"value" : 6171,
15067+
"extensions" : [ "SPV_INTEL_fpga_latency_control" ],
15068+
"version" : "None"
15069+
},
1490815070
{
1490915071
"enumerant" : "FPGAArgumentInterfacesINTEL",
1491015072
"value" : 6174,

‎include/spirv/unified1/spirv.cs

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -192,6 +192,7 @@ public enum ExecutionMode
192192
NumSIMDWorkitemsINTEL = 5896,
193193
SchedulerTargetFmaxMhzINTEL = 5903,
194194
StreamingInterfaceINTEL = 6154,
195+
RegisterMapInterfaceINTEL = 6160,
195196
NamedBarrierCountINTEL = 6417,
196197
}
197198

@@ -506,6 +507,8 @@ public enum Decoration
506507
MaxByteOffsetId = 47,
507508
NoSignedWrap = 4469,
508509
NoUnsignedWrap = 4470,
510+
WeightTextureQCOM = 4487,
511+
BlockMatchTextureQCOM = 4488,
509512
ExplicitInterpAMD = 4999,
510513
OverrideCoverageNV = 5248,
511514
PassthroughNV = 5250,
@@ -575,6 +578,8 @@ public enum Decoration
575578
VectorComputeCallableFunctionINTEL = 6087,
576579
MediaBlockIOINTEL = 6140,
577580
FPMaxErrorINTEL = 6170,
581+
LatencyControlLabelINTEL = 6172,
582+
LatencyControlConstraintINTEL = 6173,
578583
ConduitKernelArgumentINTEL = 6175,
579584
RegisterMapKernelArgumentINTEL = 6176,
580585
MMHostInterfaceAddressWidthINTEL = 6177,
@@ -1019,6 +1024,9 @@ public enum Capability
10191024
RayQueryKHR = 4472,
10201025
RayTraversalPrimitiveCullingKHR = 4478,
10211026
RayTracingKHR = 4479,
1027+
TextureSampleWeightedQCOM = 4484,
1028+
TextureBoxFilterQCOM = 4485,
1029+
TextureBlockMatchQCOM = 4486,
10221030
Float16ImageAMD = 5008,
10231031
ImageGatherBiasLodAMD = 5009,
10241032
FragmentMaskAMD = 5010,
@@ -1146,8 +1154,11 @@ public enum Capability
11461154
OptNoneINTEL = 6094,
11471155
AtomicFloat16AddEXT = 6095,
11481156
DebugInfoModuleINTEL = 6114,
1157+
BFloat16ConversionINTEL = 6115,
11491158
SplitBarrierINTEL = 6141,
1159+
FPGAKernelAttributesv2INTEL = 6161,
11501160
FPMaxErrorDecorationINTEL = 6169,
1161+
FPGALatencyControlINTEL = 6171,
11511162
FPGAArgumentInterfacesINTEL = 6174,
11521163
GroupUniformArithmeticKHR = 6400,
11531164
}
@@ -1635,6 +1646,10 @@ public enum Op
16351646
OpRayQueryConfirmIntersectionKHR = 4476,
16361647
OpRayQueryProceedKHR = 4477,
16371648
OpRayQueryGetIntersectionTypeKHR = 4479,
1649+
OpImageSampleWeightedQCOM = 4480,
1650+
OpImageBoxFilterQCOM = 4481,
1651+
OpImageBlockMatchSSDQCOM = 4482,
1652+
OpImageBlockMatchSADQCOM = 4483,
16381653
OpGroupIAddNonUniformAMD = 5000,
16391654
OpGroupFAddNonUniformAMD = 5001,
16401655
OpGroupFMinNonUniformAMD = 5002,
@@ -1952,6 +1967,8 @@ public enum Op
19521967
OpTypeStructContinuedINTEL = 6090,
19531968
OpConstantCompositeContinuedINTEL = 6091,
19541969
OpSpecConstantCompositeContinuedINTEL = 6092,
1970+
OpConvertFToBF16INTEL = 6116,
1971+
OpConvertBF16ToFINTEL = 6117,
19551972
OpControlBarrierArriveINTEL = 6142,
19561973
OpControlBarrierWaitINTEL = 6143,
19571974
OpGroupIMulKHR = 6401,

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