diff --git a/ip/dvi2rgb/src/ChannelBond.vhd b/ip/dvi2rgb/src/ChannelBond.vhd
index 091545bd..a429d7be 100644
--- a/ip/dvi2rgb/src/ChannelBond.vhd
+++ b/ip/dvi2rgb/src/ChannelBond.vhd
@@ -102,7 +102,7 @@ FIFO_WrA: process (PixelClk)
 begin
    if Rising_Edge(PixelClk) then
       if (pAllVld = '1') then
-         pWrA <= pWrA + 1;
+         pWrA <= (pWrA + 1) mod kFIFO_Depth;
       else -- when invalid data, go back to the beginning
          pWrA <= 0;
       end if;
@@ -115,7 +115,7 @@ begin
       if (pAllVld = '0') then
          pRdA <= 0;
       elsif (pRdEn = '1') then
-         pRdA <= pRdA + 1;
+         pRdA <= (pRdA + 1) mod kFIFO_Depth;
       end if;   
    end if;
 end process FIFO_RdA;
diff --git a/ip/dvi2rgb/src/EEPROM_8b.vhd b/ip/dvi2rgb/src/EEPROM_8b.vhd
index 53787d57..ebc0e30f 100644
--- a/ip/dvi2rgb/src/EEPROM_8b.vhd
+++ b/ip/dvi2rgb/src/EEPROM_8b.vhd
@@ -87,7 +87,7 @@ constant kRAM_Width : integer := 8;
 type eeprom_t is array (0 to 2**kAddrBits - 1) of std_logic_vector(kRAM_Width-1 downto 0);
 
 impure function InitRamFromFile (ramfilename : in string) return eeprom_t is
-file ramfile : text is in ramfilename;
+file ramfile : text open read_mode is ramfilename;
 variable ramfileline : line;
 variable ram_name	: eeprom_t;
 variable bitvec : bit_vector(kRAM_Width-1 downto 0);
@@ -172,7 +172,7 @@ begin
          if (sState = stRegAddress) then
             sAddr <= to_integer(resize(unsigned(sI2C_DataIn), kAddrBits));
          elsif (sState = stRead) then
-            sAddr <= sAddr + 1;
+            sAddr <= (sAddr + 1) mod (2**kAddrBits);
          end if;
       end if;
    end if;
diff --git a/ip/dvi2rgb/src/PhaseAlign.vhd b/ip/dvi2rgb/src/PhaseAlign.vhd
index 085fac44..38cdbe8f 100644
--- a/ip/dvi2rgb/src/PhaseAlign.vhd
+++ b/ip/dvi2rgb/src/PhaseAlign.vhd
@@ -147,7 +147,7 @@ begin
       if (pCtlTknRst = '1') then
          pCtlTknCnt <= 0;
       else
-         pCtlTknCnt <= pCtlTknCnt + 1;
+         pCtlTknCnt <= (pCtlTknCnt + 1) mod kCtlTknCount;
          -- Overflow
          if (pCtlTknCnt = kCtlTknCount - 1) then
             pCtlTknOvf <= '1';
@@ -231,7 +231,7 @@ begin
       if (pDelayWaitRst = '1') then
          pDelayWaitCnt <= 0;
       else
-         pDelayWaitCnt <= pDelayWaitCnt + 1;
+         pDelayWaitCnt <= (pDelayWaitCnt + 1) mod kDelayWaitEnd;
          if (pDelayWaitCnt = kDelayWaitEnd - 1) then
             pDelayWaitOvf <= '1';
          else
diff --git a/ip/dvi2rgb/src/TWI_SlaveCtl.vhd b/ip/dvi2rgb/src/TWI_SlaveCtl.vhd
index 1d649036..4fba96f2 100644
--- a/ip/dvi2rgb/src/TWI_SlaveCtl.vhd
+++ b/ip/dvi2rgb/src/TWI_SlaveCtl.vhd
@@ -179,10 +179,10 @@ DATABYTE_SHREG: process (SampleClk)
 				bitCount <= 7;
 			elsif (shiftBitOut = '1' and fSCLFalling = '1') then
 				dataByte <= dataByte(dataByte'high-1 downto 0) & dSDA;
-				bitCount <= bitCount - 1;
+				bitCount <= (bitCount - 1) mod 8;
 			elsif (shiftBitIn = '1' and fSCLRising = '1') then
 				dataByte <= dataByte(dataByte'high-1 downto 0) & dSDA;
-				bitCount <= bitCount - 1;
+				bitCount <= (bitCount - 1) mod 8;
 			end if;
 		end if;
 	end process;
diff --git a/ip/dvi2rgb/src/dvi2rgb.vhd b/ip/dvi2rgb/src/dvi2rgb.vhd
index 756e45b7..421b8a00 100644
--- a/ip/dvi2rgb/src/dvi2rgb.vhd
+++ b/ip/dvi2rgb/src/dvi2rgb.vhd
@@ -167,6 +167,10 @@ signal dbg_pEyeSize : eyeSize_t;
 
 signal pTrigOut, pTrigOutAck, rTrigOutAck, rTrigOut : std_logic;
 
+type OtherCh_t is array (2 downto 0) of std_logic_vector(1 downto 0);
+signal OtherChRdy : OtherCh_t;
+signal OtherChVld : OtherCh_t;
+
 begin
 
 ResetActiveLow: if not kRstActiveHigh generate
@@ -226,6 +230,10 @@ LockedSync: entity work.ResetBridge
                
 -- Three data channel decoders
 DataDecoders: for iCh in 2 downto 0 generate
+   OtherChRdy(iCh)(0) <= pRdy((iCh+1) mod 3);
+   OtherChRdy(iCh)(1) <= pRdy((iCh+2) mod 3);
+   OtherChVld(iCh)(0) <= pVld((iCh+1) mod 3);
+   OtherChVld(iCh)(1) <= pVld((iCh+2) mod 3);
    DecoderX: entity work.TMDS_Decoder
       generic map (
          kCtlTknCount => kMinTknCntForBlank, --how many subsequent control tokens make a valid blank detection (DVI spec)
@@ -241,8 +249,8 @@ DataDecoders: for iCh in 2 downto 0 generate
          pRst                    => pRst_int,
          sDataIn_p               => TMDS_Data_p(iCh),                           
          sDataIn_n               => TMDS_Data_n(iCh),                                       
-         pOtherChRdy(1 downto 0) => pRdy((iCh+1) mod 3) & pRdy((iCh+2) mod 3), -- tie channels together for channel de-skew
-         pOtherChVld(1 downto 0) => pVld((iCh+1) mod 3) & pVld((iCh+2) mod 3), -- tie channels together for channel de-skew
+         pOtherChRdy(1 downto 0) => OtherChRdy(iCh), -- tie channels together for channel de-skew
+         pOtherChVld(1 downto 0) => OtherChVld(iCh), -- tie channels together for channel de-skew
          
          pC0                     => pC0(iCh),
          pC1                     => pC1(iCh),