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Add RLE compress options under LA mode
1 parent 7ffab48 commit c7cba6a

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7 files changed

+38
-2
lines changed

7 files changed

+38
-2
lines changed

DSView/pv/prop/binding/deviceoptions.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,7 @@ DeviceOptions::DeviceOptions(struct sr_dev_inst *sdi) :
105105
bind_bool(name, key);
106106
break;
107107

108+
case SR_CONF_RLE_SUPPORT:
108109
case SR_CONF_CLOCK_TYPE:
109110
case SR_CONF_CLOCK_EDGE:
110111
case SR_CONF_INSTANT:

DSView/pv/toolbars/samplingbar.cpp

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -426,8 +426,10 @@ void SamplingBar::update_sample_count_selector()
426426
bool stream_mode = false;
427427
uint64_t hw_depth = 0;
428428
uint64_t sw_depth;
429+
uint64_t rle_depth = 0;
429430
double pre_duration = SR_SEC(1);
430431
double duration;
432+
bool rle_support = false;
431433

432434
if (_updating_sample_count)
433435
return;
@@ -464,23 +466,38 @@ void SamplingBar::update_sample_count_selector()
464466
sw_depth = AnalogMaxSWDepth;
465467
}
466468

469+
if (dev_inst->dev_inst()->mode == LOGIC) {
470+
gvar = dev_inst->get_config(NULL, NULL, SR_CONF_RLE_SUPPORT);
471+
if (gvar != NULL) {
472+
rle_support = g_variant_get_boolean(gvar);
473+
g_variant_unref(gvar);
474+
}
475+
if (rle_support)
476+
rle_depth = min(hw_depth*SR_KB(1), sw_depth);
477+
}
478+
467479
if (0 != _sample_count.count())
468480
pre_duration = _sample_count.itemData(
469481
_sample_count.currentIndex()).value<double>();
470482
_sample_count.clear();
471483
const uint64_t samplerate = _sample_rate.itemData(
472484
_sample_rate.currentIndex()).value<uint64_t>();
485+
const double hw_duration = hw_depth / (samplerate * (1.0 / SR_SEC(1)));
473486
if (dev_inst->dev_inst()->mode == DSO)
474487
duration = SR_SEC(10);
475488
else if (stream_mode)
476489
duration = sw_depth / (samplerate * (1.0 / SR_SEC(1)));
490+
else if (rle_support)
491+
duration = rle_depth / (samplerate * (1.0 / SR_SEC(1)));
477492
else
478-
duration = hw_depth / (samplerate * (1.0 / SR_SEC(1)));
493+
duration = hw_duration;
479494

480495
bool not_last = true;
481496
do {
497+
QString suffix = (dev_inst->dev_inst()->mode == DSO) ? DIVString :
498+
(!stream_mode & duration > hw_duration) ? RLEString : "";
482499
char *const s = sr_time_string(duration);
483-
_sample_count.addItem(QString(s) + ((dev_inst->dev_inst()->mode == DSO) ? DIVString : ""),
500+
_sample_count.addItem(QString(s) + suffix,
484501
qVariantFromValue(duration));
485502
g_free(s);
486503

libsigrok4DSL/hardware/DSL/dsl.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -861,6 +861,12 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
861861
devc = sdi->priv;
862862
*data = g_variant_new_uint64(devc->cur_samplerate);
863863
break;
864+
case SR_CONF_RLE_SUPPORT:
865+
if (!sdi)
866+
return SR_ERR;
867+
devc = sdi->priv;
868+
*data = g_variant_new_boolean(devc->rle_support);
869+
break;
864870
case SR_CONF_CLOCK_TYPE:
865871
if (!sdi)
866872
return SR_ERR;

libsigrok4DSL/hardware/DSL/dsl.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -333,6 +333,7 @@ struct DSL_context {
333333
gboolean clock_type;
334334
gboolean clock_edge;
335335
gboolean rle_mode;
336+
gboolean rle_support;
336337
gboolean instant;
337338
uint16_t op_mode;
338339
gboolean stream;

libsigrok4DSL/hardware/DSL/dslogic.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,7 @@ static const int32_t hwoptions[] = {
124124
SR_CONF_THRESHOLD,
125125
SR_CONF_FILTER,
126126
SR_CONF_MAX_HEIGHT,
127+
SR_CONF_RLE_SUPPORT,
127128
SR_CONF_CLOCK_TYPE,
128129
SR_CONF_CLOCK_EDGE,
129130
};
@@ -134,6 +135,7 @@ static const int32_t hwoptions_pro[] = {
134135
SR_CONF_VTH,
135136
SR_CONF_FILTER,
136137
SR_CONF_MAX_HEIGHT,
138+
SR_CONF_RLE_SUPPORT,
137139
SR_CONF_CLOCK_TYPE,
138140
SR_CONF_CLOCK_EDGE,
139141
};
@@ -145,6 +147,7 @@ static const int32_t sessions[] = {
145147
SR_CONF_CHANNEL_MODE,
146148
SR_CONF_SAMPLERATE,
147149
SR_CONF_LIMIT_SAMPLES,
150+
SR_CONF_RLE_SUPPORT,
148151
SR_CONF_CLOCK_TYPE,
149152
SR_CONF_CLOCK_EDGE,
150153
SR_CONF_THRESHOLD,
@@ -163,6 +166,7 @@ static const int32_t sessions_pro[] = {
163166
SR_CONF_CHANNEL_MODE,
164167
SR_CONF_SAMPLERATE,
165168
SR_CONF_LIMIT_SAMPLES,
169+
SR_CONF_RLE_SUPPORT,
166170
SR_CONF_CLOCK_TYPE,
167171
SR_CONF_CLOCK_EDGE,
168172
SR_CONF_VTH,
@@ -864,6 +868,8 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
864868

865869
if (id == SR_CONF_CLOCK_TYPE) {
866870
devc->clock_type = g_variant_get_boolean(data);
871+
} else if (id == SR_CONF_RLE_SUPPORT) {
872+
devc->rle_support = g_variant_get_boolean(data);
867873
} else if (id == SR_CONF_CLOCK_EDGE) {
868874
devc->clock_edge = g_variant_get_boolean(data);
869875
} else if (id == SR_CONF_LIMIT_SAMPLES) {

libsigrok4DSL/hwdriver.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,8 @@ static struct sr_config_info sr_config_info_data[] = {
108108
"Threshold Level", "Threshold Level", NULL},
109109
{SR_CONF_VTH, SR_T_FLOAT, "threshold",
110110
"Threshold Level", "Threshold Level", NULL},
111+
{SR_CONF_RLE_SUPPORT, SR_T_BOOL, "rle",
112+
"Enable RLE Compress", "Enable RLE Compress", NULL},
111113

112114
{SR_CONF_PROBE_COUPLING, SR_T_CHAR, "coupling",
113115
"Coupling", "Coupling", NULL},

libsigrok4DSL/libsigrok.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -874,6 +874,9 @@ enum {
874874
/** Device channel mode */
875875
SR_CONF_CHANNEL_MODE,
876876

877+
/** RLE compress support */
878+
SR_CONF_RLE_SUPPORT,
879+
877880
/** Signal max height **/
878881
SR_CONF_MAX_HEIGHT,
879882
SR_CONF_MAX_HEIGHT_VALUE,

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