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i#6662 public traces: update doc (#7139)
Updates the documentation on Public Google Workload Traces. Gives a description of the new format: the #DR_ISA_REGDEPS synthetic ISA that instructions follow, what TRACE_MARKER_TYPE_* are present or have been modified, what is v2p.textproto. Issue #6662
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clients/drcachesim/docs/drcachesim.dox.in

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@@ -998,60 +998,124 @@ $ bin64/drrun -t drmemtrace -indir newdir -tool basic_counts
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\endcode
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****************************************************************************
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\page google_workload_traces Google Workload Traces
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\page google_workload_traces Google Workload Traces (Version 2)
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With the rapid growth of internet services and cloud computing,
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workloads on warehouse-scale computers (WSCs) have become an important
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segment of today’s computing market. These workloads differ from
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segment of today’s computing market. These workloads differ from
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others in their requirements of on-demand scalability, elasticity and
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availability. They have fundamentally different characteristics from
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availability. They have fundamentally different characteristics from
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traditional benchmarks and require changes to modern computer
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architecture to achieve optimal efficiency. Google is sharing
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instruction and memory address traces from workloads running in Google
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data centers so that computer architecture researchers can study and
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develop new architecture ideas to improve the performance and
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efficiency of this important class of workloads.
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efficiency of this important class of workloads. To protect Google's
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intellectual property, these traces have had their original ISA replaced
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with a synthetic ISA that we call #DR_ISA_REGDEPS. This synthetic ISA
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removes architecture specific details (e.g., the opcode of instructions),
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while still providing enough information (e.g., register dependencies,
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instruction categories) to perform meaningful analyses and simulations.
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\section sec_google_format Trace Format
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\section sec_google_format Public Trace Format
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The Google workload traces are captured using DynamoRIO's
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[drmemtrace](@ref page_drcachesim). The traces are records of
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instruction and memory accesses as described at \ref
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sec_drcachesim_format. We separate instruction and memory access
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records from each software thread into a separate file
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(.memtrace.gz). In addition, for each software thread, we also provide
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a branch_trace which contains execution data (taken/not taken, branch
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target) about each branch instruction (conditional, non-conditional,
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calls, etc.). Finally, for each workload trace, we provide a thread
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statistics file (.threadstats.csv) which contains the thread ID (tid),
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instruction count, non-fetched instruction count (e.g. implicit
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instructions generated from microcode), load count, store count, and
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prefetch count.
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sec_drcachesim_format. While memory accesses are left unchanged
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compared to the original trace, instructions follow the
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#DR_ISA_REGDEPS synthetic ISA.
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#DR_ISA_REGDEPS has the purpose of preserving register dependencies and giving
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hints on the type of operation an instruction performs.
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Being a synthetic ISA, some routines that work on instructions coming from an
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actual ISA (such as #DR_ISA_AMD64) are not supported (e.g., decode_sizeof()).
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We do support decode() and decode_from_copy(): to decode an encoded #DR_ISA_REGDEPS
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instruction into an #instr_t.
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A #DR_ISA_REGDEPS #instr_t contains the following information:
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- Categories: composed by #dr_instr_category_t values, they indicate the type of
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operation performed (e.g., a load, a store, a floating point math operation, a
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branch, etc.). Note that categories are composable, hence more than one category
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can be set. This information can be obtained using instr_get_category().
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- Arithmetic flags: we don't distinguish between different flags, we only report if
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at least one arithmetic flag was read (all arithmetic flags will be set to read)
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and/or written (all arithmetic flags will be set to written). This information
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can be obtained using instr_get_arith_flags().
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- Number of source and destination operands: we only consider register operands.
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This information can be obtained using instr_num_srcs() and instr_num_dsts().
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Memory operands can be deduced by subsequent read and write records in the trace.
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- Source operation size: is the largest source operand the original ISA instruction
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operated on. This information can be obtained using instr_get_operation_size().
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- List of register operand identifiers: they are contained in #opnd_t lists,
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separated in source and destination. Note that these #reg_id_t identifiers are
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virtual and it should not be assumed that they belong to any DR_REG_ enum value
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of any specific architecture. These identifiers are meant for tracking register
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dependencies with respect to other #DR_ISA_REGDEPS instructions only. These
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lists can be obtained by walking the #instr_t operands with instr_get_dst() and
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instr_get_src().
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- ISA mode: is always #DR_ISA_REGDEPS. This information can be obtained using
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instr_get_isa_mode().
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- Encoding bytes: an array of bytes containing the #DR_ISA_REGDEPS #instr_t
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encoding. Note that this information is present only for decoded instructions
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(i.e., #instr_t generated by decode() or decode_from_copy()). This information
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can be obtained using instr_get_raw_bits().
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- Length: the length of the encoded instruction in bytes. Note that this
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information is present only for decoded instructions (i.e., #instr_t generated by
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decode() or decode_from_copy()). This information can be obtained using instr_length().
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Be aware that in Google Workload Traces the instruction fetch size of a
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#dynamorio::drmemtrace::memref_t and the instr_length() of the corresponding fetched
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instruction do not match! To allow analyses and simulations of front-end behavior to
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have a realistic size of fetched instructions, we kept the instruction fetch size to
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be the same as in the original ISA instruction.
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Note that all routines that operate on #instr_t and #opnd_t are also supported for
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#DR_ISA_REGDEPS instructions and their operands. However, querying information outside
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of those described above will return the zeroed value set by instr_create() or
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instr_init() when the #instr_t was created.
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On top of instructions and memory acceses, traces also have
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#dynamorio::drmemtrace::trace_marker_type_t markers.
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All markers of the original trace are present, except for:
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SYSCALL_IDX
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SYSCALL
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SYSCALL_TRACE_START
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SYSCALL_TRACE_END
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SYSCALL_FAILED
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_SIGNAL_NUMBER
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Which have been removed.
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Because tracing overhead results into inflated context switches, the
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#dynamorio::drmemtrace::TRACE_MARKER_TYPE_CPU_ID values have been modified to
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"unknown CPU" to avoid confusion. We recommend users to use our scheduler
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(see \ref sec_drcachesim_sched) for a realistic schedule of a trace's threads.
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Also, we preserved the following markers:
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_FUNC_ID
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_FUNC_ARG
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_FUNC_RETVAL
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- #dynamorio::drmemtrace::TRACE_MARKER_TYPE_FUNC_RETADDR
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But only for SYS_futex functions.
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Finally, every trace has a v2p.textproto file associated to it, which provides a
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plausible virtual to physical mapping of the virtual addresses present in a trace
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for more realistic TLB simulations. This is a static virtual to physical mapping
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with 2 MB pages. Users can generate different mappings (e.g., smaller page size)
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by modifying this file, or create their own mapping following the same
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v2p.textproto format.
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These traces are supported starting from DynamoRIO 11.3.
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\section sec_google_get Getting the Traces
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The Google Workload Traces can be downloaded from:
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- [Google workload trace folder](https://console.cloud.google.com/storage/browser/external-traces)
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- [Google workload trace folder](https://console.cloud.google.com/storage/browser/external-traces-v2)
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Directory convention:
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Directory structure:
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- \verbatim
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workload/trace-X/
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\endverbatim
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where X is sequential starting from 1
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Filename convention:
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- Memory trace file:
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\verbatim
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<uuid>.<tid>.memtrace.gz
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\endverbatim
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- Branch trace file:
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\verbatim
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<uuid>.branch_trace.<tid>.csv.gz
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\endverbatim
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- Thread statistics summary:
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\verbatim
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<uuid>.threadstats.csv
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workload_name/
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<uuid>.<tid>.memtrace.zip
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v2p.textproto
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\endverbatim
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\section sec_google_help Getting Help and Reporting Bugs
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hit is a bug in your own code or in provided code, use the
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[DynamoRIO users group mailing list/discussion forum]
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(http://groups.google.com/group/dynamorio-users) rather than
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opening an issue in the tracker. The users list will reach a wider
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opening an issue in the tracker. The users list will reach a wider
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audience of people who might have an answer, and it will reach other
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users who may find the information beneficial.
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- Providing suggestions for improving trace formats.
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- Sharing and collaborating on architecture research.
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- Reporting issues: see \ref sec_google_help
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- Reporting issues: see \ref sec_google_help .
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\section sec_google_cite Cite Google Workload Traces
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If you would like to cite this work, you can use the following BibTeX entry:
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\verbatim
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@misc{ Google_Workload_Traces_Version_2,
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title = {{Google Workload Traces Version 2}},
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howpublished = {\url{https://console.cloud.google.com/storage/browser/external-traces-v2}},
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note = {Accessed: yyyy-mm-dd}
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}
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\endverbatim
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\section sec_public_v1_deprecated Deprecated Google Workload Traces (Version 1)
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The previous version of Google workload traces contains a subset of the
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information of the current traces and has been deprecated.
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Please use the current version described above.
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The previous version can still be found at:
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- [Google workload trace folder (Version 1)](https://console.cloud.google.com/storage/browser/external-traces)
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DynamoRIO 11.0 is the latest version that supports these traces.
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****************************************************************************
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\page sec_drcachesim_config_file Configuration File

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