Merge branch 'develop'

Author: lleon95

README.md

@@ -28,7 +28,7 @@ CYNQ is pretty similar to PYNQ, let's have a look.
 
 PYNQ:
 
-```python
+~~~~~~~~~~~~~{.py}
 from pynq import allocate, Overlay
 
 # Configure the FPGA
@@ -52,11 +52,11 @@ dma.recvchannel.wait()
 # Dispose the buffers
 del input_hw
 del output_hw
-```
+~~~~~~~~~~~~~
 
 With CYNQ for Xilinx Ultrascale+:
 
-```c++
+~~~~~~~~~~~~~{.cpp}
 #include <cynq/cynq.hpp>
 
 using namespace cynq;
@@ -90,11 +90,11 @@ mover->Download(out_mem, outbuf->Size(), 0, ExecutionType::Sync);
 accel->Stop();
 
 // Dispose? We use RAII
-```
+~~~~~~~~~~~~~
 
 With CYNQ for Alveo
 
-```c++
+~~~~~~~~~~~~~{.cpp}
 #include <cynq/cynq.hpp>
 
 using namespace cynq;
@@ -126,7 +126,7 @@ accel->Start(StartMode::Once);
 mover->Download(out_mem, outbuf->Size(), 0, ExecutionType::Sync);
 
 // Dispose? We use RAII
-```
+~~~~~~~~~~~~~
 
 ## Currently tested
 
@@ -142,14 +142,14 @@ So far, we have tested CYNQ on:
 
 Cite Us:
 
-```
+~~~~~~~~~~~~~
 @misc{cynq,
   author = {{León-Vega, Luis G.
               AND Ávila-Torres, Diego
               AND Castro-Godínez, Jorge
             }},
-  title = {{CYNQ (v0.2)}},
+  title = {{CYNQ (v0.3)}},
   year  = {2024},
   url   = {https://github.com/ECASLab/cynq},
 } 
-```
+~~~~~~~~~~~~~

docs/ClassDiagram.md

@@ -5,11 +5,32 @@ interface IHardware {
   +{abstract} Reset() -> Status
   +{abstract} GetDataMover(address = 0) -> IDataMover *
   +{abstract} GetAccelerator(address: uint64) -> IAccelerator *
-  +{abstract} GetAccelerator(address: string) -> IAccelerator *
+  +{virtual} GetExecutionStream(name: string, impl: IExecutionStreamType, config: ExecutionGraphParameters) -> IExecutionGraph *
+  +{virtual} GetClocks() -> float[]
+  +{virtual} SetClocks(clocks: float[]) -> Status
   +{static} Create(hw: HardwareArchitecture, bitstream: string, xclbin: string) -> IHardware*
   +{static} Create(hw: HardwareArchitecture, config: string) -> IHardware*
 }
 
+interface IExecutionGraph {
+  +{abstract} Add(func: std::function<void()>, deps: NodeID[] = {}) -> NodeID
+  +{abstract} Sync(node: NodeID = last) -> Status
+  +{abstract} GetLastError() -> Status
+  +{static} Create(impl: IExecutionStreamType, config: ExecutionGraphParameters) -> IExecutionStream*
+}
+
+struct IExecutionGraph::Node {
+  id: NodeID,
+  func: std::function<void()>
+  deps: NodeID[]
+  parents: pointer []
+  children: pointer []
+}
+
+struct ExecutionGraphParameters {
+  name: Stream
+}
+
 interface IMemory {
   {abstract} #GetHostAddress() -> uint8_t *
   {abstract} #GetDeviceAddress() -> uint8_t *
@@ -115,6 +136,8 @@ class UltraScale {
   +Reset() -> Status
   +GetDataMover(address, type : DataMoverType) -> DMADataMover *
   +GetAccelerator(address: uint64) -> MMIOAccelerator *
+  +{virtual} GetClocks() -> float[]
+  +{virtual} SetClocks(clocks: float[]) -> Status
   +UltraScale(hw, bitsteam, xclbin)
 }
 
@@ -172,6 +195,13 @@ class XRTDataMover {
   XrtDataMover(mem_bank)
 }
 
+class ExecutionStream {
+  +Add(func: std::function<void()>, deps: NodeID[] = {}) -> NodeID
+  +Sync(node: NodeID = last) -> Status
+  +GetLastError() -> Status
+}
+
+ExecutionStream ..> IExecutionGraph
 UltraScale ..> IHardware
 Alveo ..> IHardware
 XRTMemory ..> IMemory

docs/Foundations.md

@@ -33,12 +33,13 @@ This first release is a huge advance towards simplicity and we expect that many
 
 ## How does CYNQ work?
 
-An application is mounted on top of an abstract interface to make the API feel agnostic. In this case, CYNQ is composed of four major components:
+An application is mounted on top of an abstract interface to make the API feel agnostic. In this case, CYNQ is composed of five major components:
 
 * Hardware class
 * Accelerator class
 * Data Mover class
 * Memory class
+* Execution Graph class
 
 Depending on the hardware, these classes are implemented in different manners by using class extension. Thus, users won't feel any change when migrating their applications from one hardware to another. We can link these classes with the following equivalences:
 
@@ -48,6 +49,7 @@ Depending on the hardware, these classes are implemented in different manners by
 | IAccelerator          | Default IP               |
 | IDataMover            | DMA IP                   |
 | IMemory               | Buffer                   |
+| IExecutionGraph       | N.A                      |
 
 As it is possible to see, there is an equivalence at the functional level.