rate-group.md: corrected a grammatical mistake

Author: pavly-gerges

docs/user-manual/design-patterns/rate-group.md

@@ -13,7 +13,7 @@ central rate group driver and achieve their rates by dividing the incoming signa
 
 The `RateGroupDriver` component is the source of the "clock" or tick for the various rate groups. It is usually driven
 off a system timing interrupt or some other reliable clock source, and it performs the clock divider functionality to
-produces a series of slower repeating tick signals that are sent to the rate groups attached to it.
+produce a series of slower repeating tick signals that are sent to the rate groups attached to it.
 
 ### System Clock Sources
 
@@ -76,4 +76,4 @@ The topology connections for rate groups can be seen here:
 [Rate Group Topology](https://github.com/nasa/fprime/blob/ddcb2ec138645da34cd4c67f250b67ee8bc67b26/Ref/Top/topology.fpp#L97-L124)
 
 A sample schedule handler can be found here:
-[Sample Schedule Handler](https://github.com/nasa/fprime/blob/ddcb2ec138645da34cd4c67f250b67ee8bc67b26/Ref/SignalGen/SignalGen.cpp#L98-L140)
+[Sample Schedule Handler](https://github.com/nasa/fprime/blob/ddcb2ec138645da34cd4c67f250b67ee8bc67b26/Ref/SignalGen/SignalGen.cpp#L98-L140)