Skip to content

Commit 3365b17

Browse files
irixxxxirixxxx
committed
Merge remote-tracking branch 'irixxxx/master' into libretro
2 parents 046e5ff + ec68ce8 commit 3365b17

File tree

16 files changed

+276
-203
lines changed

16 files changed

+276
-203
lines changed

‎cpu/DrZ80/drz80.S‎

Lines changed: 199 additions & 139 deletions
Large diffs are not rendered by default.

‎cpu/DrZ80/drz80.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ struct DrZ80
6565
unsigned short (*z80_read16)(unsigned short a);
6666
unsigned int (*z80_rebaseSP)(unsigned short new_sp);
6767
unsigned int (*z80_rebasePC)(unsigned short new_pc);
68-
unsigned int bla;
68+
void *internal;
6969
};
7070

7171
extern int DrZ80Run(struct DrZ80 *pcy,unsigned int cyc);

‎cpu/drc/emit_arm.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1188,12 +1188,12 @@ static int insn_cond = A_COND_AL;
11881188
emith_jump_ctx(offs); \
11891189
} while (0)
11901190

1191+
#define emith_abijump(target) \
1192+
emith_jump(target)
11911193
#define emith_abijump_reg(r) \
11921194
emith_jump_reg(r)
11931195
#define emith_abicall(target) \
11941196
emith_call(target)
1195-
#define emith_abicall_cond(cond, target) \
1196-
emith_call_cond(cond, target)
11971197
#define emith_abicall_reg(r) \
11981198
emith_call_reg(r)
11991199

‎cpu/drc/emit_arm64.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1080,12 +1080,12 @@ static void emith_ldst_offs(int sz, int rd, int rn, int o9, int ld, int mode)
10801080
rcache_free_tmp(_t); \
10811081
} while (0)
10821082

1083+
#define emith_abijump(target) \
1084+
emith_jump(target)
10831085
#define emith_abijump_reg(r) \
10841086
emith_jump_reg(r)
10851087
#define emith_abicall(target) \
10861088
emith_call(target)
1087-
#define emith_abicall_cond(cond, target) \
1088-
emith_abicall(target)
10891089
#define emith_abicall_reg(r) \
10901090
emith_call_reg(r)
10911091

‎cpu/drc/emit_mips.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1544,6 +1544,10 @@ static int emith_cond_check(int cond, int *r)
15441544
emith_call_reg(CR); \
15451545
} while (0)
15461546

1547+
#define emith_abijump(target) do { \
1548+
emith_move_r_ptr_imm(CR, target); \
1549+
emith_branch(MIPS_JR(CR)); \
1550+
} while (0)
15471551
#define emith_abijump_reg(r) do { \
15481552
if ((r) != CR) emith_move_r_r(CR, r); \
15491553
emith_branch(MIPS_JR(CR)); \
@@ -1552,8 +1556,6 @@ static int emith_cond_check(int cond, int *r)
15521556
emith_move_r_ptr_imm(CR, target); \
15531557
emith_branch(MIPS_JALR(LR, CR)); \
15541558
} while (0)
1555-
#define emith_abicall_cond(cond, target) \
1556-
emith_abicall(target)
15571559
#define emith_abicall_reg(r) do { \
15581560
if ((r) != CR) emith_move_r_r(CR, r); \
15591561
emith_branch(MIPS_JALR(LR, CR)); \

‎cpu/drc/emit_ppc.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1447,6 +1447,9 @@ static int emith_cond_check(int cond)
14471447
emith_abicall_reg(CR); \
14481448
} while (0)
14491449

1450+
#define emith_abijump(target) \
1451+
emith_move_r_ptr_imm(CR, target); \
1452+
emith_abijump_reg(CR);
14501453
#ifdef __PS3__
14511454
#define emith_abijump_reg(r) \
14521455
emith_read_r_r_offs_ptr(TOC_REG, r, PTR_SIZE); \
@@ -1460,8 +1463,6 @@ static int emith_cond_check(int cond)
14601463
#define emith_abicall(target) \
14611464
emith_move_r_ptr_imm(CR, target); \
14621465
emith_abicall_reg(CR);
1463-
#define emith_abicall_cond(cond, target) \
1464-
emith_abicall(target)
14651466
#ifdef __PS3__
14661467
#define emith_abicall_reg(r) do { \
14671468
emith_read_r_r_offs_ptr(TOC_REG, r, PTR_SIZE); \

‎cpu/drc/emit_riscv.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1333,12 +1333,12 @@ static int emith_cond_check(int cond, int *r, int *s)
13331333
emith_call_reg(AT); \
13341334
} while (0)
13351335

1336+
#define emith_abijump(target) \
1337+
emith_jump(target)
13361338
#define emith_abijump_reg(r) \
13371339
emith_jump_reg(r)
13381340
#define emith_abicall(target) \
13391341
emith_call(target)
1340-
#define emith_abicall_cond(cond, target) \
1341-
emith_abicall(target)
13421342
#define emith_abicall_reg(r) \
13431343
emith_call_reg(r)
13441344

‎cpu/drc/emit_x86.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -909,12 +909,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI, // x86-64,i386 common
909909
emith_ret(); \
910910
} while (0)
911911

912+
#define emith_abijump(target) \
913+
emith_jump(target)
912914
#define emith_abijump_reg(r) \
913915
emith_jump_reg(r)
914916
#define emith_abicall(target) \
915917
emith_call(target)
916-
#define emith_abicall_cond(cond, target) \
917-
emith_abicall(target)
918918
#define emith_abicall_reg(r) \
919919
emith_call_reg(r)
920920

‎cpu/sh2/compiler.c‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3785,7 +3785,13 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
37853785
goto end_op;
37863786

37873787
case OP_SLEEP: // SLEEP 0000000000011011
3788-
printf("TODO sleep\n");
3788+
sr = rcache_get_reg(SHR_SR, RC_GR_RMW, NULL);
3789+
emith_sync_t(sr);
3790+
emith_cmp_r_imm(sr, 0);
3791+
EMITH_SJMP_START(DCOND_LT);
3792+
emith_clear_msb(sr, sr, 20);
3793+
EMITH_SJMP_END(DCOND_LT);
3794+
cycles = 0;
37893795
goto end_op;
37903796

37913797
case OP_RTE: // RTE 0000000000101011

‎cpu/sh2/compiler.h‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -71,14 +71,15 @@ extern void REGPARM(1) (*sh2_drc_restore_sr)(SH2 *sh2);
7171
#else
7272
#define DRC_DECLARE_SR register long _sh2_sr asm(DRC_SR_REG)
7373
#endif
74-
// NB: save/load SR register only when DRC is executing and not in DMA access
74+
75+
// NB: save/load SR register only needed when DRC is executing
7576
#define DRC_SAVE_SR(sh2) \
76-
if (likely((sh2->state & (SH2_IN_DRC|SH2_STATE_SLEEP)) == SH2_IN_DRC)) \
77-
sh2->sr = (s32)_sh2_sr
77+
if (likely(sh2->state & SH2_IN_DRC)) \
78+
sh2->sr = (s32)_sh2_sr;
7879
// host_call(sh2_drc_save_sr, (SH2 *))(sh2)
7980
#define DRC_RESTORE_SR(sh2) \
80-
if (likely((sh2->state & (SH2_IN_DRC|SH2_STATE_SLEEP)) == SH2_IN_DRC)) \
81-
_sh2_sr = (s32)sh2->sr
81+
if (likely(sh2->state & SH2_IN_DRC)) \
82+
_sh2_sr = (s32)sh2->sr;
8283
// host_call(sh2_drc_restore_sr, (SH2 *))(sh2)
8384
#else
8485
#define DRC_DECLARE_SR

0 commit comments

Comments
 (0)