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jgavillalobosjgavillalobos
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Fix issues after rebase
1 parent d0a2ab3 commit 1c1bd3f

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3 files changed

+37
-44
lines changed

3 files changed

+37
-44
lines changed

‎modules/router/src/img_initiator.cpp‎

Lines changed: 14 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -83,11 +83,10 @@ struct img_initiator: sc_module
8383

8484
data = transaction->get_data_ptr();
8585
//-----------DEBUG-----------
86-
dbgmodprint("Reading at Initiator: ");
86+
dbgmodprint(use_prints, "Reading at Initiator: ");
8787
for (long unsigned int i = 0; i < transaction->get_data_length()/sizeof(int); ++i){
88-
dbgmodprint("%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
88+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
8989
}
90-
printf("\n");
9190
//-----------DEBUG-----------
9291
}
9392

@@ -110,11 +109,10 @@ struct img_initiator: sc_module
110109
transaction->set_extension(img_ext);
111110

112111
//-----------DEBUG-----------
113-
dbgmodprint("Writing: ");
112+
dbgmodprint(use_prints, "Writing: ");
114113
for (long unsigned int i = 0; i < data_length/sizeof(int); ++i){
115-
dbgmodprint("%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
114+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
116115
}
117-
printf("\n");
118116
//-----------DEBUG-----------
119117

120118
//Set transaction
@@ -136,14 +134,14 @@ struct img_initiator: sc_module
136134

137135
this->transaction_sent_id = img_ext->transaction_number;
138136

139-
dbgmodprint("BEGIN_REQ SENT TRANS ID %0d", img_ext->transaction_number);
137+
dbgmodprint(use_prints, "BEGIN_REQ SENT TRANS ID %0d", img_ext->transaction_number);
140138
status = socket->nb_transport_fw(*transaction, phase, ((cur_command == tlm::TLM_WRITE_COMMAND) ? this->write_delay : this->read_delay)); // Non-blocking transport call
141139

142140
// Check request status returned by target
143141
switch (status) {
144142
//Case 1: Transaction was accepted
145143
case tlm::TLM_ACCEPTED: {
146-
dbgmodprint("%s received -> Transaction ID %d", "TLM_ACCEPTED", img_ext->transaction_number);
144+
dbgmodprint(use_prints, "%s received -> Transaction ID %d", "TLM_ACCEPTED", img_ext->transaction_number);
147145
check_transaction(*transaction);
148146
//transaction->release();
149147
//Initiator only cares about sending the transaction, doesnt need to wait for response (non-blocking)
@@ -152,7 +150,7 @@ struct img_initiator: sc_module
152150

153151
//Not implementing Updated and Completed Status
154152
default: {
155-
dbgmodprint("[ERROR] Invalid status received at initiator -> Transaction ID %d", img_ext->transaction_number);
153+
dbgmodprint(use_prints, "[ERROR] Invalid status received at initiator -> Transaction ID %d", img_ext->transaction_number);
156154
break;
157155
}
158156
}
@@ -163,11 +161,10 @@ struct img_initiator: sc_module
163161
this->transaction_received_id = img_ext->transaction_number;
164162
// }
165163
//-----------DEBUG-----------
166-
dbgmodprint("[DEBUG1] Reading at Initiator: ");
164+
dbgmodprint(use_prints, "[DEBUG1] Reading at Initiator: ");
167165
for (long unsigned int i = 0; i < transaction->get_data_length()/sizeof(int); ++i){
168-
dbgmodprint("%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
166+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(transaction->get_data_ptr())+i));
169167
}
170-
printf("\n");
171168
//-----------DEBUG-----------
172169

173170
//Increment transaction ID
@@ -187,7 +184,7 @@ struct img_initiator: sc_module
187184
void peq_cb(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase)
188185
{
189186

190-
//dbgmodprint("%s received -> Transaction ID %d from address %x", phase, this->id_extension->transaction_id);
187+
//dbgmodprint(use_prints, "%s received -> Transaction ID %d from address %x", phase, this->id_extension->transaction_id);
191188
//cout << name() << " " <<hex << trans.get_address() << " BEGIN_RESP RECEIVED at " << sc_time_stamp() << endl;
192189
switch (phase) {
193190
case tlm::BEGIN_RESP: {
@@ -197,20 +194,18 @@ struct img_initiator: sc_module
197194
//Initiator dont care about confirming resp transaction. So nothing else to do.
198195

199196
//-----------DEBUG-----------
200-
dbgmodprint("[DEBUG] Reading at Initiator: ");
197+
dbgmodprint(use_prints, "[DEBUG] Reading at Initiator: ");
201198
for (long unsigned int i = 0; i < trans.get_data_length()/sizeof(int); ++i){
202-
dbgmodprint("%02x", *(reinterpret_cast<int*>(trans.get_data_ptr())+i));
199+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(trans.get_data_ptr())+i));
203200
}
204-
printf("\n");
205201
//-----------DEBUG-----------
206202

207203
transaction_received_e.notify();
208204
//-----------DEBUG-----------
209-
dbgmodprint("[DEBUG] Reading at Initiator: ");
205+
dbgmodprint(use_prints, "[DEBUG] Reading at Initiator: ");
210206
for (long unsigned int i = 0; i < trans.get_data_length()/sizeof(int); ++i){
211-
dbgmodprint("%02x", *(reinterpret_cast<int*>(trans.get_data_ptr())+i));
207+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(trans.get_data_ptr())+i));
212208
}
213-
printf("\n");
214209
//-----------DEBUG-----------
215210
break;
216211
}

‎modules/router/src/img_router.cpp‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -113,25 +113,25 @@ struct img_router: sc_module
113113
switch(address) {
114114
// To Filter
115115
case IMG_FILTER_KERNEL: {
116-
dbgmodprint("Decoded address %016llX corresponds to Filter module.", address);
116+
dbgmodprint(use_prints, "Decoded address %016llX corresponds to Filter module.", address);
117117
return IMG_FILTER_INITIATOR_ID;
118118
}
119119

120120
// To/from Sobel
121121
case SOBEL_INPUT_0:
122122
case SOBEL_INPUT_1:
123123
case SOBEL_OUTPUT: {
124-
dbgmodprint("Decoded address %016llX corresponds to Sobel module.", address);
124+
dbgmodprint(use_prints, "Decoded address %016llX corresponds to Sobel module.", address);
125125
return IMG_SOBEL_INITIATOR_ID;
126126
}
127127

128128
// To/From Memory Valid addresses
129129
case MEM_START ... MEM_FINISH : {
130-
dbgmodprint("Decoded address %016llX corresponds to Memory.", address);
130+
dbgmodprint(use_prints, "Decoded address %016llX corresponds to Memory.", address);
131131
return IMG_MEMORY_INITIATOR_ID;
132132
}
133133
default: {
134-
dbgmodprint("[ERROR] Decoding invalid address %016llX.", address);
134+
dbgmodprint(use_prints, "[ERROR] Decoding invalid address %016llX.", address);
135135
SC_REPORT_FATAL("[IMG ROUTER]", "Received address is invalid, does not match any hardware block");
136136
return INVALID_INITIATOR_ID;
137137
}
@@ -151,12 +151,12 @@ struct img_router: sc_module
151151
item.delay = delay;
152152
trans.get_extension(img_ext);
153153
if (bw_fifo.num_free() == 0) {
154-
dbgmodprint("[BW_FIFO] FIFO is FULL. Waiting...");
154+
dbgmodprint(use_prints, "[BW_FIFO] FIFO is FULL. Waiting...");
155155
wait(bw_fifo.data_read_event());
156156
}
157157
bw_fifo.nb_write(item);
158158
wait(bw_fifo.data_written_event());
159-
dbgmodprint("[BW_FIFO] Pushed transaction #%0d", img_ext->transaction_number);
159+
dbgmodprint(use_prints, "[BW_FIFO] Pushed transaction #%0d", img_ext->transaction_number);
160160
return tlm::TLM_ACCEPTED;
161161
}
162162

@@ -173,12 +173,12 @@ struct img_router: sc_module
173173
item.delay = delay;
174174
trans.get_extension(img_ext);
175175
if (fw_fifo.num_free() == 0) {
176-
dbgmodprint("[FW_FIFO] FIFO is FULL. Waiting...");
176+
dbgmodprint(use_prints, "[FW_FIFO] FIFO is FULL. Waiting...");
177177
wait(fw_fifo.data_read_event());
178178
}
179179
fw_fifo.nb_write(item);
180180
wait(fw_fifo.data_written_event());
181-
dbgmodprint("[FW_FIFO] Pushed transaction #%0d", img_ext->transaction_number);
181+
dbgmodprint(use_prints, "[FW_FIFO] Pushed transaction #%0d", img_ext->transaction_number);
182182
return tlm::TLM_ACCEPTED;
183183
}
184184

@@ -199,7 +199,7 @@ struct img_router: sc_module
199199
phase = item.phase;
200200
delay = item.delay;
201201
(*trans_ptr).get_extension(img_ext);
202-
dbgmodprint("[FW_FIFO] Popped transaction #%0d", img_ext->transaction_number);
202+
dbgmodprint(use_prints, "[FW_FIFO] Popped transaction #%0d", img_ext->transaction_number);
203203
fw_m_peq.notify(*trans_ptr, phase, delay);
204204
wait(fw_delay);
205205
}
@@ -222,7 +222,7 @@ struct img_router: sc_module
222222
phase = item.phase;
223223
delay = item.delay;
224224
(*trans_ptr).get_extension(img_ext);
225-
dbgmodprint("[BW_FIFO] Popped transaction #%0d", img_ext->transaction_number);
225+
dbgmodprint(use_prints, "[BW_FIFO] Popped transaction #%0d", img_ext->transaction_number);
226226
bw_m_peq.notify(*trans_ptr, phase, delay);
227227
wait(bw_delay);
228228
}
@@ -238,7 +238,7 @@ struct img_router: sc_module
238238
sc_dt::uint64 address = trans.get_address();
239239
this->transaction_in_bw_path_id = img_ext->transaction_number;
240240

241-
dbgmodprint("Received transaction #%0d with address %016llX in backward path. Redirecting transaction to CPU", img_ext->transaction_number, address);
241+
dbgmodprint(use_prints, "Received transaction #%0d with address %016llX in backward path. Redirecting transaction to CPU", img_ext->transaction_number, address);
242242
target_socket->nb_transport_bw(trans, local_phase, this->bw_delay);
243243
}
244244

@@ -252,7 +252,7 @@ struct img_router: sc_module
252252
this->transaction_in_fw_path_id = img_ext->transaction_number;
253253

254254
unsigned int initiator_id = decode_address(address);
255-
dbgmodprint("Received transaction #%0d with address %016llX in forward path. Redirecting transaction through initiator %d", img_ext->transaction_number, address, initiator_id);
255+
dbgmodprint(use_prints, "Received transaction #%0d with address %016llX in forward path. Redirecting transaction through initiator %d", img_ext->transaction_number, address, initiator_id);
256256
(*initiator_socket[initiator_id])->nb_transport_fw(trans, local_phase, this->fw_delay);
257257
}
258258

‎modules/router/src/img_target.cpp‎

Lines changed: 11 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ struct img_target: sc_module
8686
trans.acquire();
8787
trans.get_extension(img_ext);
8888

89-
dbgmodprint("BEGIN_REQ RECEIVED TRANS ID %0d", img_ext->transaction_number);
89+
dbgmodprint(use_prints, "BEGIN_REQ RECEIVED TRANS ID %0d", img_ext->transaction_number);
9090

9191
//Queue a response
9292
tlm::tlm_phase int_phase = internal_processing_ph;
@@ -101,7 +101,7 @@ struct img_target: sc_module
101101
}
102102
default: {
103103
if (phase == internal_processing_ph){
104-
dbgmodprint("INTERNAL PHASE: PROCESSING TRANSACTION");
104+
dbgmodprint(use_prints, "INTERNAL PHASE: PROCESSING TRANSACTION");
105105
process_transaction(trans);
106106
}
107107
break;
@@ -127,13 +127,13 @@ struct img_target: sc_module
127127
// Target only care about acknowledge of the succesful response
128128
(*response_transaction).release();
129129
(*response_transaction).get_extension(img_ext);
130-
dbgmodprint("TLM_ACCEPTED RECEIVED TRANS ID %0d", img_ext->transaction_number);
130+
dbgmodprint(use_prints, "TLM_ACCEPTED RECEIVED TRANS ID %0d", img_ext->transaction_number);
131131
break;
132132
}
133133

134134
//Not implementing Updated and Completed Status
135135
default: {
136-
dbgmodprint("[ERROR] Invalid status received at target");
136+
dbgmodprint(use_prints, "[ERROR] Invalid status received at target");
137137
break;
138138
}
139139
}
@@ -161,7 +161,7 @@ struct img_target: sc_module
161161
unsigned int len = trans.get_data_length();
162162
trans.get_extension(img_ext);
163163

164-
dbgmodprint("Processing transaction: %0d", img_ext->transaction_number);
164+
dbgmodprint(use_prints, "Processing transaction: %0d", img_ext->transaction_number);
165165
this->transaction_in_progress_id = img_ext->transaction_number;
166166

167167
//Process transaction
@@ -172,33 +172,31 @@ struct img_target: sc_module
172172
this->do_when_read_transaction(response_data_ptr, len, addr);
173173
//Add read according to length
174174
//-----------DEBUG-----------
175-
dbgmodprint("[DEBUG] Reading: ");
175+
dbgmodprint(use_prints, "[DEBUG] Reading: ");
176176
for (long unsigned int i = 0; i < len/sizeof(int); ++i){
177-
dbgmodprint("%02x", *(reinterpret_cast<int*>(response_data_ptr)+i));
177+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(response_data_ptr)+i));
178178
}
179-
printf("\n");
180179
//-----------DEBUG-----------
181180
trans.set_data_ptr(response_data_ptr);
182181
break;
183182
}
184183
case tlm::TLM_WRITE_COMMAND: {
185184
this->do_when_write_transaction(data_ptr, len, addr);
186185
//-----------DEBUG-----------
187-
dbgmodprint("[DEBUG] Writing: ");
186+
dbgmodprint(use_prints, "[DEBUG] Writing: ");
188187
for (long unsigned int i = 0; i < len/sizeof(int); ++i){
189-
dbgmodprint("%02x", *(reinterpret_cast<int*>(data_ptr)+i));
188+
dbgmodprint(use_prints, "%02x", *(reinterpret_cast<int*>(data_ptr)+i));
190189
}
191-
printf("\n");
192190
//-----------DEBUG-----------
193191
break;
194192
}
195193
default: {
196-
dbgmodprint("ERROR Command %0d is NOT valid", cmd);
194+
dbgmodprint(use_prints, "ERROR Command %0d is NOT valid", cmd);
197195
}
198196
}
199197

200198
//Send response
201-
dbgmodprint("BEGIN_RESP SENT TRANS ID %0d", img_ext->transaction_number);
199+
dbgmodprint(use_prints, "BEGIN_RESP SENT TRANS ID %0d", img_ext->transaction_number);
202200
response_transaction = &trans;
203201
//send_response(trans);
204202
send_response_e.notify();

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