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Adding VGA module and its testbench
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‎modules/vga/Makefile‎

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# Include common Makefile
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include ../Makefile
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INCDIR+=-I$(SYSTEMC_AMS_HOME)/include
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LIBDIR+=-L$(SYSTEMC_AMS_HOME)/lib-linux64
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LIBS+=-lsystemc-ams
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# Defining preprocessor directive for debug
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ifdef IPS_DEBUG_EN
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CFLAGS += -DIPS_DEBUG_EN
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LFLAGS += -DIPS_DEBUG_EN
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endif # IPS_DEBUG_EN
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# Defining preprocessor directive for dumping enable
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ifdef IPS_DUMP_EN
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CFLAGS += -DIPS_DUMP_EN
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LFLAGS += -DIPS_DUMP_EN
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endif # IPS_DUMP_EN
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# Run the compiled file
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run:
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@./$(TARGET)
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# Show waveform
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waveform:
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@gtkwave ips_vga.vcd

‎modules/vga/include/vga.hpp‎

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#ifndef IPS_VGA_MODEL_HPP
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#define IPS_VGA_MODEL_HPP
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#include <systemc.h>
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#define IPS_VGA_ACTIVE true
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#define IPS_VGA_INACTIVE false
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/**
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* @brief VGA representation class
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*
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* @tparam CLK_FREQ - clock frequency in HHz of the VGA
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* @tparam H_ACTIVE - output horizontal active video pixels
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* @tparam H_FP - wait after the display period before the sync
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* horizontal pulse
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* @tparam H_SYNC_PULSE - assert HSYNC
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* @tparam H_BP - wait after the sync horizontal pulse before starting
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* the next display period
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* @tparam V_ACTIVE - output vertical active video pixels
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* @tparam V_FP - wait after the display period before the sync
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* vertical pulse
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* @tparam V_SYNC_PULSE - assert VSYNC
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* @tparam V_BP - wait after the sync vertical pulse before starting
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* the next display period
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*/
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template <
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unsigned int H_ACTIVE = 640,
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unsigned int H_FP = 16,
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unsigned int H_SYNC_PULSE = 96,
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unsigned int H_BP = 48,
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unsigned int V_ACTIVE = 480,
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unsigned int V_FP = 10,
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unsigned int V_SYNC_PULSE = 2,
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unsigned int V_BP = 33
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>
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SC_MODULE(vga)
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{
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protected:
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// Horizontal count
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int h_count;
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// Vertical count
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int v_count;
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public:
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// Input clock
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sc_core::sc_in<bool> clk;
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// Output horizontal synch
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sc_core::sc_out<bool> o_hsync;
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// Output vertical synch
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sc_core::sc_out<bool> o_vsync;
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#ifdef IPS_DEBUG_EN
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// For debug
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sc_core::sc_out<int> o_h_count;
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sc_core::sc_out<int> o_v_count;
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#endif // IPS_DEBUG_EN
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SC_CTOR(vga) : o_hsync("o_hsync"), o_vsync("o_vsync")
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{
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this->h_count = 0;
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this->v_count = 0;
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SC_METHOD(run);
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sensitive << clk.pos();
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}
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/**
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* @brief Override method
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* Compute the values output of the VGA
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*
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*/
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void run()
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{
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if (this->clk.read())
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{
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#ifdef IPS_DEBUG_EN
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std::cout << "@" << sc_core::sc_time_stamp().to_seconds() * 1e6 << "us" << std::endl;
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#endif // IPS_DEBUG_EN
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// Increment H counter
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this->h_count++;
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// HSYNC pulse
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if (this->h_count == H_SYNC_PULSE)
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{
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this->o_hsync.write(IPS_VGA_ACTIVE);
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}
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// End of H-sync pulse
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else if (this->h_count == (H_SYNC_PULSE + H_BP))
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{
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this->o_hsync.write(IPS_VGA_ACTIVE);
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}
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// H front porch
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else if (this->h_count == (H_SYNC_PULSE + H_BP + H_ACTIVE))
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{
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this->o_hsync.write(IPS_VGA_INACTIVE);
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}
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// End of HSYNC
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else if (this->h_count == (H_SYNC_PULSE + H_BP + H_ACTIVE + H_FP))
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{
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// Restart H counter
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this->o_hsync.write(IPS_VGA_ACTIVE);
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this->h_count = 0;
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// Increment H counter
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this->v_count++;
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// VSYNC pulse
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if (this->v_count == V_SYNC_PULSE)
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{
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this->o_vsync.write(IPS_VGA_INACTIVE);
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}
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// End of V-sync pulse
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else if (this->v_count == (V_SYNC_PULSE + V_BP))
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{
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this->o_vsync.write(IPS_VGA_ACTIVE);
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}
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// V front porch
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else if (this->v_count == (V_SYNC_PULSE + V_BP + V_ACTIVE))
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{
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this->o_vsync.write(IPS_VGA_INACTIVE);
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}
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// End of VSYNC
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else if (this->v_count == (V_SYNC_PULSE + V_BP + V_ACTIVE + V_FP))
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{
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this->o_vsync.write(IPS_VGA_ACTIVE);
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this->v_count = 0;
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}
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}
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#ifdef IPS_DEBUG_EN
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this->o_v_count.write(this->v_count);
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this->o_h_count.write(this->h_count);
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#endif // IPS_DEBUG_EN
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}
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}
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};
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#endif // IPS_VGA_MODEL_HPP

‎modules/vga/src/vga_tb.cpp‎

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#include <systemc.h>
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#include "vga.hpp"
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// 120 MHz
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#define CLK_FREQ 120000000
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#define H_ACTIVE 640
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#define H_FP 16
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#define H_SYNC_PULSE 96
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#define H_BP 48
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#define V_ACTIVE 480
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#define V_FP 10
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#define V_SYNC_PULSE 2
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#define V_BP 33
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#define TOTAL_PIXELES ((H_ACTIVE + H_FP + H_SYNC_PULSE + H_BP) *\
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(V_ACTIVE + V_FP + V_SYNC_PULSE + V_BP))
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int sc_main(int, char*[])
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{
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const double CLK_TIME = 1.0 / static_cast<double>(CLK_FREQ);
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const double SIM_TIME = CLK_TIME * static_cast<double>(TOTAL_PIXELES);
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sc_time total_sim_time = sc_time(SIM_TIME, SC_SEC);
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sc_core::sc_clock s_clk("clk", CLK_TIME, sc_core::SC_SEC);
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sc_core::sc_signal<bool> s_hsync;
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sc_core::sc_signal<bool> s_vsync;
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#ifdef IPS_DEBUG_EN
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sc_core::sc_signal<int> s_h_count;
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sc_core::sc_signal<int> s_v_count;
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#endif // IPS_DEBUG_EN
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vga<
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H_ACTIVE, H_FP, H_SYNC_PULSE, H_BP,
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V_ACTIVE, V_FP, V_SYNC_PULSE, V_BP
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> ips_vga("ips_vga");
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ips_vga.clk(s_clk);
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ips_vga.o_hsync(s_hsync);
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ips_vga.o_vsync(s_vsync);
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#ifdef IPS_DEBUG_EN
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ips_vga.o_h_count(s_h_count);
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ips_vga.o_v_count(s_v_count);
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#endif // IPS_DEBUG_EN
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#ifdef IPS_DUMP_EN
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sca_util::sca_trace_file* tf = sca_util::sca_create_vcd_trace_file("ips_vga");
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sca_trace(tf, s_clk, "clk");
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sca_trace(tf, s_hsync, "hsync");
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sca_trace(tf, s_vsync, "vsync");
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#ifdef IPS_DEBUG_EN
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sca_trace(tf, s_h_count, "h_count");
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sca_trace(tf, s_v_count, "v_count");
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#endif // IPS_DEBUG_EN
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#endif // IPS_DUMP_EN
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std::cout << "@" << sc_time_stamp() << std::endl;
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std::cout << "Expected total sim time: " << total_sim_time << std::endl;
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sc_start(SIM_TIME, sc_core::SC_SEC);
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std::cout << "@" << sc_time_stamp() << std::endl;
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#ifdef IPS_DUMP_EN
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sca_util::sca_close_vcd_trace_file(tf);
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#endif // IPS_DUMP_EN
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return 0;
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}

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