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1 parent 7707094 commit 32712a4Copy full SHA for 32712a4
doc/releases/migration-guide-4.3.rst
@@ -39,6 +39,14 @@ Device Drivers and Devicetree
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.. zephyr-keep-sorted-start re(^\w)
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+Phy
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+===
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+
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+* Nodes with compatible property :dtcompatible:`st,stm32u5-otghs-phy` now need to select the
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+ CLKSEL (phy reference clock) in the SYSCFG_OTGHSPHYCR register using the new property
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+ clock-reference. The selection directly depends on the value on OTGHSSEL (OTG_HS PHY kernel
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+ clock source selection) located in the RCC_CCIPR2 register.
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Sensors
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=======
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