@@ -12,6 +12,8 @@ LOG_MODULE_REGISTER(dma_cc23x0, CONFIG_DMA_LOG_LEVEL);
1212#include <zephyr/device.h>
1313#include <zephyr/drivers/dma.h>
1414#include <zephyr/irq.h>
15+ #include <zephyr/pm/device.h>
16+ #include <zephyr/pm/policy.h>
1517#include <zephyr/sys/util.h>
1618
1719#include <driverlib/clkctl.h>
@@ -56,6 +58,18 @@ struct dma_cc23x0_data {
5658 struct dma_cc23x0_channel channels [UDMA_NUM_CHANNELS ];
5759};
5860
61+ static inline void dma_cc23x0_pm_policy_state_lock_get (void )
62+ {
63+ pm_policy_state_lock_get (PM_STATE_RUNTIME_IDLE , PM_ALL_SUBSTATES );
64+ pm_policy_state_lock_get (PM_STATE_STANDBY , PM_ALL_SUBSTATES );
65+ }
66+
67+ static inline void dma_cc23x0_pm_policy_state_lock_put (void )
68+ {
69+ pm_policy_state_lock_put (PM_STATE_STANDBY , PM_ALL_SUBSTATES );
70+ pm_policy_state_lock_put (PM_STATE_RUNTIME_IDLE , PM_ALL_SUBSTATES );
71+ }
72+
5973/*
6074 * If the channel is a software channel, then the completion will be signaled
6175 * on this DMA dedicated interrupt.
@@ -343,27 +357,44 @@ static int dma_cc23x0_get_status(const struct device *dev, uint32_t channel,
343357 return 0 ;
344358}
345359
346- static int dma_cc23x0_init (const struct device * dev )
360+ static int dma_cc23x0_pm_action (const struct device * dev , enum pm_device_action action )
347361{
348362 struct dma_cc23x0_data * data = dev -> data ;
363+ int ret = 0 ;
364+
365+ switch (action ) {
366+ case PM_DEVICE_ACTION_SUSPEND :
367+ uDMADisable ();
368+ CLKCTLDisable (CLKCTL_BASE , CLKCTL_DMA );
369+ dma_cc23x0_pm_policy_state_lock_put ();
370+ break ;
371+ case PM_DEVICE_ACTION_RESUME :
372+ dma_cc23x0_pm_policy_state_lock_get ();
373+ CLKCTLEnable (CLKCTL_BASE , CLKCTL_DMA );
374+ uDMAEnable ();
375+ /* Set base address for channel control table (descriptors) */
376+ uDMASetControlBase (data -> desc );
377+ break ;
378+ case PM_DEVICE_ACTION_TURN_ON :
379+ case PM_DEVICE_ACTION_TURN_OFF :
380+ break ;
381+ default :
382+ ret = - ENOTSUP ;
383+ }
384+
385+ return ret ;
386+ }
349387
388+ static int dma_cc23x0_init (const struct device * dev )
389+ {
350390 IRQ_CONNECT (DT_INST_IRQN (0 ),
351391 DT_INST_IRQ (0 , priority ),
352392 dma_cc23x0_isr ,
353393 DEVICE_DT_INST_GET (0 ),
354394 0 );
355395 irq_enable (DT_INST_IRQN (0 ));
356396
357- /* Enable clock */
358- CLKCTLEnable (CLKCTL_BASE , CLKCTL_DMA );
359-
360- /* Enable DMA */
361- uDMAEnable ();
362-
363- /* Set base address for channel control table (descriptors) */
364- uDMASetControlBase (data -> desc );
365-
366- return 0 ;
397+ return pm_device_driver_init (dev , dma_cc23x0_pm_action );
367398}
368399
369400static struct dma_cc23x0_data cc23x0_data ;
@@ -376,7 +407,10 @@ static DEVICE_API(dma, dma_cc23x0_api) = {
376407 .get_status = dma_cc23x0_get_status ,
377408};
378409
379- DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_init , NULL ,
410+ PM_DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_pm_action );
411+
412+ DEVICE_DT_INST_DEFINE (0 , dma_cc23x0_init ,
413+ PM_DEVICE_DT_INST_GET (0 ),
380414 & cc23x0_data , NULL ,
381415 PRE_KERNEL_1 , CONFIG_DMA_INIT_PRIORITY ,
382416 & dma_cc23x0_api );
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