soc: arm: stm32h7 defining a mpu region for the external NOR flash

Add the MPU_REGION_ENTRY for the NOR flash memory with
STRONGLY_ORDERED_SHAREABLE attribute

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

soc/arm/st_stm32/stm32h7/mpu_regions.c

@@ -8,6 +8,8 @@
 #include <zephyr/arch/arm/aarch32/cortex_m/arm_mpu_mem_cfg.h>
 
 static const struct arm_mpu_region mpu_regions[] = {
+	MPU_REGION_ENTRY("XSPI", 0x90000000,
+					 REGION_RAM_NOCACHE_ATTR(REGION_64M)),
 	MPU_REGION_ENTRY("FLASH", CONFIG_FLASH_BASE_ADDRESS,
 					 REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
 	MPU_REGION_ENTRY("SRAM", CONFIG_SRAM_BASE_ADDRESS,
@@ -20,7 +22,6 @@ static const struct arm_mpu_region mpu_regions[] = {
 					{ (STRONGLY_ORDERED_SHAREABLE |
 					REGION_512K |
 					MPU_RASR_XN_Msk | P_RW_U_NA_Msk) }),
-
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay)
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(sram3), okay)
 	MPU_REGION_ENTRY("SRAM3_ETH_BUF",