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hkasivisalexdeucher
hkasivis
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alexdeucher
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drm/amdkfd: Add support for more per-process flag
Add support for more per-process flags starting with option to configure MFMA precision for gfx 9.5 v2: Change flag name to KFD_PROC_FLAG_MFMA_HIGH_PRECISION Remove unused else condition v3: Bump the KFD API version v4: Missed SH_MEM_CONFIG__PRECISION_MODE__SHIFT define. Added it. Signed-off-by: Harish Kasiviswanathan <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Amber Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
1 parent 61972cd commit cf6d949

11 files changed

+47
-19
lines changed

‎drivers/gpu/drm/amd/amdkfd/kfd_chardev.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -606,7 +606,8 @@ static int kfd_ioctl_set_memory_policy(struct file *filep,
606606
default_policy,
607607
alternate_policy,
608608
(void __user *)args->alternate_aperture_base,
609-
args->alternate_aperture_size))
609+
args->alternate_aperture_size,
610+
args->misc_process_flag))
610611
err = -EINVAL;
611612

612613
out:

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2596,7 +2596,8 @@ static bool set_cache_memory_policy(struct device_queue_manager *dqm,
25962596
enum cache_policy default_policy,
25972597
enum cache_policy alternate_policy,
25982598
void __user *alternate_aperture_base,
2599-
uint64_t alternate_aperture_size)
2599+
uint64_t alternate_aperture_size,
2600+
u32 misc_process_properties)
26002601
{
26012602
bool retval = true;
26022603

@@ -2611,7 +2612,8 @@ static bool set_cache_memory_policy(struct device_queue_manager *dqm,
26112612
default_policy,
26122613
alternate_policy,
26132614
alternate_aperture_base,
2614-
alternate_aperture_size);
2615+
alternate_aperture_size,
2616+
misc_process_properties);
26152617

26162618
if (retval)
26172619
goto out;

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,8 @@ struct device_queue_manager_ops {
174174
enum cache_policy default_policy,
175175
enum cache_policy alternate_policy,
176176
void __user *alternate_aperture_base,
177-
uint64_t alternate_aperture_size);
177+
uint64_t alternate_aperture_size,
178+
u32 misc_process_properties);
178179

179180
int (*process_termination)(struct device_queue_manager *dqm,
180181
struct qcm_process_device *qpd);
@@ -210,7 +211,8 @@ struct device_queue_manager_asic_ops {
210211
enum cache_policy default_policy,
211212
enum cache_policy alternate_policy,
212213
void __user *alternate_aperture_base,
213-
uint64_t alternate_aperture_size);
214+
uint64_t alternate_aperture_size,
215+
u32 misc_process_properties);
214216
void (*init_sdma_vm)(struct device_queue_manager *dqm,
215217
struct queue *q,
216218
struct qcm_process_device *qpd);

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,8 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm,
4040
enum cache_policy default_policy,
4141
enum cache_policy alternate_policy,
4242
void __user *alternate_aperture_base,
43-
uint64_t alternate_aperture_size);
43+
uint64_t alternate_aperture_size,
44+
u32 misc_process_properties);
4445
static int update_qpd_cik(struct device_queue_manager *dqm,
4546
struct qcm_process_device *qpd);
4647
static void init_sdma_vm(struct device_queue_manager *dqm,
@@ -88,7 +89,8 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm,
8889
enum cache_policy default_policy,
8990
enum cache_policy alternate_policy,
9091
void __user *alternate_aperture_base,
91-
uint64_t alternate_aperture_size)
92+
uint64_t alternate_aperture_size,
93+
u32 misc_process_properties)
9294
{
9395
uint32_t default_mtype;
9496
uint32_t ape1_mtype;

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v10.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ static bool set_cache_memory_policy_v10(struct device_queue_manager *dqm,
3636
enum cache_policy default_policy,
3737
enum cache_policy alternate_policy,
3838
void __user *alternate_aperture_base,
39-
uint64_t alternate_aperture_size);
39+
uint64_t alternate_aperture_size,
40+
u32 misc_process_properties);
4041

4142
void device_queue_manager_init_v10(
4243
struct device_queue_manager_asic_ops *asic_ops)
@@ -61,7 +62,8 @@ static bool set_cache_memory_policy_v10(struct device_queue_manager *dqm,
6162
enum cache_policy default_policy,
6263
enum cache_policy alternate_policy,
6364
void __user *alternate_aperture_base,
64-
uint64_t alternate_aperture_size)
65+
uint64_t alternate_aperture_size,
66+
u32 misc_process_properties)
6567
{
6668
qpd->sh_mem_config = (SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
6769
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v11.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,8 @@ static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
3535
enum cache_policy default_policy,
3636
enum cache_policy alternate_policy,
3737
void __user *alternate_aperture_base,
38-
uint64_t alternate_aperture_size);
38+
uint64_t alternate_aperture_size,
39+
u32 misc_process_properties);
3940

4041
void device_queue_manager_init_v11(
4142
struct device_queue_manager_asic_ops *asic_ops)
@@ -60,7 +61,8 @@ static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
6061
enum cache_policy default_policy,
6162
enum cache_policy alternate_policy,
6263
void __user *alternate_aperture_base,
63-
uint64_t alternate_aperture_size)
64+
uint64_t alternate_aperture_size,
65+
u32 misc_process_properties)
6466
{
6567
qpd->sh_mem_config = (SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
6668
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v12.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,8 @@ static bool set_cache_memory_policy_v12(struct device_queue_manager *dqm,
3535
enum cache_policy default_policy,
3636
enum cache_policy alternate_policy,
3737
void __user *alternate_aperture_base,
38-
uint64_t alternate_aperture_size);
38+
uint64_t alternate_aperture_size,
39+
u32 misc_process_properties);
3940

4041
void device_queue_manager_init_v12(
4142
struct device_queue_manager_asic_ops *asic_ops)
@@ -60,7 +61,8 @@ static bool set_cache_memory_policy_v12(struct device_queue_manager *dqm,
6061
enum cache_policy default_policy,
6162
enum cache_policy alternate_policy,
6263
void __user *alternate_aperture_base,
63-
uint64_t alternate_aperture_size)
64+
uint64_t alternate_aperture_size,
65+
u32 misc_process_properties)
6466
{
6567
qpd->sh_mem_config = (SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
6668
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,8 @@ static bool set_cache_memory_policy_v9(struct device_queue_manager *dqm,
3535
enum cache_policy default_policy,
3636
enum cache_policy alternate_policy,
3737
void __user *alternate_aperture_base,
38-
uint64_t alternate_aperture_size);
38+
uint64_t alternate_aperture_size,
39+
u32 misc_process_properties);
3940

4041
void device_queue_manager_init_v9(
4142
struct device_queue_manager_asic_ops *asic_ops)
@@ -60,7 +61,8 @@ static bool set_cache_memory_policy_v9(struct device_queue_manager *dqm,
6061
enum cache_policy default_policy,
6162
enum cache_policy alternate_policy,
6263
void __user *alternate_aperture_base,
63-
uint64_t alternate_aperture_size)
64+
uint64_t alternate_aperture_size,
65+
u32 misc_process_properties)
6466
{
6567
qpd->sh_mem_config = SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
6668
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
@@ -73,6 +75,11 @@ static bool set_cache_memory_policy_v9(struct device_queue_manager *dqm,
7375
KFD_GC_VERSION(dqm->dev->kfd) == IP_VERSION(9, 5, 0))
7476
qpd->sh_mem_config |= (1 << SH_MEM_CONFIG__F8_MODE__SHIFT);
7577

78+
if (KFD_GC_VERSION(dqm->dev->kfd) == IP_VERSION(9, 5, 0)) {
79+
if (misc_process_properties & KFD_PROC_FLAG_MFMA_HIGH_PRECISION)
80+
qpd->sh_mem_config |= 1 << SH_MEM_CONFIG__PRECISION_MODE__SHIFT;
81+
}
82+
7683
qpd->sh_mem_ape1_limit = 0;
7784
qpd->sh_mem_ape1_base = 0;
7885
qpd->sh_mem_bases = compute_sh_mem_bases_64bit(qpd_to_pdd(qpd));

‎drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,8 @@ static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
4040
enum cache_policy default_policy,
4141
enum cache_policy alternate_policy,
4242
void __user *alternate_aperture_base,
43-
uint64_t alternate_aperture_size);
43+
uint64_t alternate_aperture_size,
44+
u32 misc_process_properties);
4445
static int update_qpd_vi(struct device_queue_manager *dqm,
4546
struct qcm_process_device *qpd);
4647
static void init_sdma_vm(struct device_queue_manager *dqm,
@@ -89,7 +90,8 @@ static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
8990
enum cache_policy default_policy,
9091
enum cache_policy alternate_policy,
9192
void __user *alternate_aperture_base,
92-
uint64_t alternate_aperture_size)
93+
uint64_t alternate_aperture_size,
94+
u32 misc_process_properties)
9395
{
9496
uint32_t default_mtype;
9597
uint32_t ape1_mtype;

‎drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2261,11 +2261,13 @@
22612261
#define SH_MEM_CONFIG__ADDRESS_MODE__SHIFT 0x0
22622262
#define SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT 0x3
22632263
#define SH_MEM_CONFIG__F8_MODE__SHIFT 0x8
2264+
#define SH_MEM_CONFIG__PRECISION_MODE__SHIFT 0x9
22642265
#define SH_MEM_CONFIG__RETRY_DISABLE__SHIFT 0xc
22652266
#define SH_MEM_CONFIG__PRIVATE_NV__SHIFT 0xd
22662267
#define SH_MEM_CONFIG__ADDRESS_MODE_MASK 0x00000001L
22672268
#define SH_MEM_CONFIG__ALIGNMENT_MODE_MASK 0x00000018L
22682269
#define SH_MEM_CONFIG__F8_MODE_MASK 0x00000100L
2270+
#define SH_MEM_CONFIG__PRECISION_MODE_MASK 0x00000200L
22692271
#define SH_MEM_CONFIG__RETRY_DISABLE_MASK 0x00001000L
22702272
#define SH_MEM_CONFIG__PRIVATE_NV_MASK 0x00002000L
22712273
//SP_MFMA_PORTD_RD_CONFIG

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