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Merged main:9ae92d70561b into amd-gfx:6cc1d54843d5
Local branch amd-gfx 6cc1d54 Merged main:44514316bd5e into amd-gfx:d5f5db91c4b0 Remote branch main 9ae92d7 [SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (llvm#119969)
2 parents 6cc1d54 + 9ae92d7 commit 3d027bc

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+326
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lines changed

libc/config/gpu/entrypoints.txt

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@@ -271,9 +271,6 @@ set(TARGET_LIBC_ENTRYPOINTS
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libc.src.locale.newlocale
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libc.src.locale.setlocale
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libc.src.locale.uselocale
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# gpu/rpc.h entrypoints
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libc.src.gpu.rpc_host_call
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)
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set(TARGET_LIBM_ENTRYPOINTS

libc/config/gpu/headers.txt

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@@ -18,7 +18,4 @@ set(TARGET_PUBLIC_HEADERS
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libc.include.uchar
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libc.include.features
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libc.include.locale
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# Header for RPC extensions
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libc.include.gpu_rpc
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)

libc/hdrgen/yaml/gpu/rpc.yaml

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libc/include/CMakeLists.txt

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@@ -750,19 +750,6 @@ add_header_macro(
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.llvm-libc-types.struct_lconv
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)
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753-
if(LIBC_TARGET_OS_IS_GPU)
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file(MAKE_DIRECTORY ${LIBC_INCLUDE_DIR}/gpu)
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add_header_macro(
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gpu_rpc
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../libc/hdrgen/yaml/gpu/rpc.yaml
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gpu/rpc.h.def
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gpu/rpc.h
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DEPENDS
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.llvm_libc_common_h
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)
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endif()
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if(NOT LLVM_LIBC_FULL_BUILD)
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# We don't install headers in non-fullbuild mode.
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return()

libc/include/gpu/rpc.h.def

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libc/src/__support/RPC/CMakeLists.txt

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@@ -9,6 +9,5 @@ add_object_library(
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HDRS
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rpc_client.h
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DEPENDS
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libc.include.gpu_rpc
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libc.src.__support.GPU.utils
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)

llvm/include/llvm/CodeGen/ISDOpcodes.h

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@@ -1490,17 +1490,6 @@ enum NodeType {
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BUILTIN_OP_END
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};
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/// FIRST_TARGET_STRICTFP_OPCODE - Target-specific pre-isel operations
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/// which cannot raise FP exceptions should be less than this value.
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/// Those that do must not be less than this value.
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static const int FIRST_TARGET_STRICTFP_OPCODE = BUILTIN_OP_END + 400;
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/// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
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/// which do not reference a specific memory location should be less than
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/// this value. Those that do must not be less than this value, and can
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/// be used with SelectionDAG::getMemIntrinsicNode.
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static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END + 500;
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/// Whether this is bitwise logic opcode.
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inline bool isBitwiseLogicOp(unsigned Opcode) {
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return Opcode == ISD::AND || Opcode == ISD::OR || Opcode == ISD::XOR;

llvm/include/llvm/CodeGen/SelectionDAG.h

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@@ -1330,8 +1330,8 @@ class SelectionDAG {
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/// Creates a MemIntrinsicNode that may produce a
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/// result and takes a list of operands. Opcode may be INTRINSIC_VOID,
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/// INTRINSIC_W_CHAIN, or a target-specific opcode with a value not
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/// less than FIRST_TARGET_MEMORY_OPCODE.
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/// INTRINSIC_W_CHAIN, or a target-specific memory-referencing opcode
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// (see `SelectionDAGTargetInfo::isTargetMemoryOpcode`).
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SDValue getMemIntrinsicNode(
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unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
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EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment,

llvm/include/llvm/CodeGen/SelectionDAGNodes.h

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Original file line numberDiff line numberDiff line change
@@ -210,7 +210,6 @@ class SDValue {
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inline const SDValue &getOperand(unsigned i) const;
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inline uint64_t getConstantOperandVal(unsigned i) const;
212212
inline const APInt &getConstantOperandAPInt(unsigned i) const;
213-
inline bool isTargetMemoryOpcode() const;
214213
inline bool isTargetOpcode() const;
215214
inline bool isMachineOpcode() const;
216215
inline bool isUndef() const;
@@ -691,22 +690,6 @@ END_TWO_BYTE_PACK()
691690
/// \<target\>ISD namespace).
692691
bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
693692

694-
/// Test if this node has a target-specific opcode that may raise
695-
/// FP exceptions (in the \<target\>ISD namespace and greater than
696-
/// FIRST_TARGET_STRICTFP_OPCODE). Note that all target memory
697-
/// opcode are currently automatically considered to possibly raise
698-
/// FP exceptions as well.
699-
bool isTargetStrictFPOpcode() const {
700-
return NodeType >= ISD::FIRST_TARGET_STRICTFP_OPCODE;
701-
}
702-
703-
/// Test if this node has a target-specific
704-
/// memory-referencing opcode (in the \<target\>ISD namespace and
705-
/// greater than FIRST_TARGET_MEMORY_OPCODE).
706-
bool isTargetMemoryOpcode() const {
707-
return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
708-
}
709-
710693
/// Return true if the type of the node type undefined.
711694
bool isUndef() const { return NodeType == ISD::UNDEF; }
712695

@@ -1255,10 +1238,6 @@ inline bool SDValue::isTargetOpcode() const {
12551238
return Node->isTargetOpcode();
12561239
}
12571240

1258-
inline bool SDValue::isTargetMemoryOpcode() const {
1259-
return Node->isTargetMemoryOpcode();
1260-
}
1261-
12621241
inline bool SDValue::isMachineOpcode() const {
12631242
return Node->isMachineOpcode();
12641243
}
@@ -1615,10 +1594,10 @@ class AtomicSDNode : public MemSDNode {
16151594
}
16161595
};
16171596

1618-
/// This SDNode is used for target intrinsics that touch
1619-
/// memory and need an associated MachineMemOperand. Its opcode may be
1620-
/// INTRINSIC_VOID, INTRINSIC_W_CHAIN, PREFETCH, or a target-specific opcode
1621-
/// with a value not less than FIRST_TARGET_MEMORY_OPCODE.
1597+
/// This SDNode is used for target intrinsics that touch memory and need
1598+
/// an associated MachineMemOperand. Its opcode may be INTRINSIC_VOID,
1599+
/// INTRINSIC_W_CHAIN, PREFETCH, or a target-specific memory-referencing
1600+
/// opcode (see `SelectionDAGTargetInfo::isTargetMemoryOpcode`).
16221601
class MemIntrinsicSDNode : public MemSDNode {
16231602
public:
16241603
MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,

llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h

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@@ -35,6 +35,19 @@ class SelectionDAGTargetInfo {
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SelectionDAGTargetInfo &operator=(const SelectionDAGTargetInfo &) = delete;
3636
virtual ~SelectionDAGTargetInfo();
3737

38+
/// Returns true if a node with the given target-specific opcode has
39+
/// a memory operand. Nodes with such opcodes can only be created with
40+
/// `SelectionDAG::getMemIntrinsicNode`.
41+
virtual bool isTargetMemoryOpcode(unsigned Opcode) const { return false; }
42+
43+
/// Returns true if a node with the given target-specific opcode has
44+
/// strict floating-point semantics.
45+
virtual bool isTargetStrictFPOpcode(unsigned Opcode) const { return false; }
46+
47+
/// Returns true if a node with the given target-specific opcode
48+
/// may raise a floating-point exception.
49+
virtual bool mayRaiseFPException(unsigned Opcode) const;
50+
3851
/// Emit target-specific code that performs a memcpy.
3952
/// This can be used by targets to provide code sequences for cases
4053
/// that don't fit the target's parameters for simple loads/stores and can be

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