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dstuttdstutt
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Reapply "DAG: Use phi to create vregs instead of the constant input" (llvm#1274)
This reverts commit 79dad70. dea5aa7 AMDGPU: Move insertion into V2SCopies map (llvm#130776) fixes the original issue.
1 parent 2cf97ba commit 6124eec

37 files changed

+5488
-8543
lines changed

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11975,7 +11975,7 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
1197511975
if (const auto *C = dyn_cast<Constant>(PHIOp)) {
1197611976
Register &RegOut = ConstantsOut[C];
1197711977
if (!RegOut) {
11978-
RegOut = FuncInfo.CreateRegs(C);
11978+
RegOut = FuncInfo.CreateRegs(&PN);
1197911979
// We need to zero/sign extend ConstantInt phi operands to match
1198011980
// assumptions in FunctionLoweringInfo::ComputePHILiveOutRegInfo.
1198111981
ISD::NodeType ExtendType = ISD::ANY_EXTEND;

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll

Lines changed: 4726 additions & 7721 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -9,13 +9,11 @@ define i32 @prolog_spill(i32 %arg0, i32 %arg1, i32 %arg2) {
99
; REGALLOC-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1010
; REGALLOC-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
1111
; REGALLOC-NEXT: {{ $}}
12-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr2, %stack.5, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.5, addrspace 5)
13-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr1, %stack.4, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
12+
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr2, %stack.4, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
13+
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr1, %stack.3, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
1414
; REGALLOC-NEXT: renamable $sgpr4 = S_MOV_B32 49
1515
; REGALLOC-NEXT: renamable $sgpr4_sgpr5 = V_CMP_GT_I32_e64 killed $vgpr0, killed $sgpr4, implicit $exec
16-
; REGALLOC-NEXT: renamable $sgpr6 = IMPLICIT_DEF
17-
; REGALLOC-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr6
18-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.3, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
16+
; REGALLOC-NEXT: renamable $vgpr0 = IMPLICIT_DEF
1917
; REGALLOC-NEXT: renamable $sgpr6_sgpr7 = COPY $exec, implicit-def $exec
2018
; REGALLOC-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 renamable $sgpr6_sgpr7, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
2119
; REGALLOC-NEXT: renamable $sgpr6_sgpr7 = S_XOR_B64 renamable $sgpr4_sgpr5, killed renamable $sgpr6_sgpr7, implicit-def dead $scc
@@ -34,8 +32,8 @@ define i32 @prolog_spill(i32 %arg0, i32 %arg1, i32 %arg2) {
3432
; REGALLOC-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR $vgpr63, 0, implicit-def $sgpr4_sgpr5
3533
; REGALLOC-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR $vgpr63, 1
3634
; REGALLOC-NEXT: renamable $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 killed renamable $sgpr4_sgpr5, implicit-def $exec, implicit-def dead $scc, implicit $exec
37-
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.3, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.3, addrspace 5)
38-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.6, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.6, addrspace 5)
35+
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.6, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.6, addrspace 5)
36+
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.5, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.5, addrspace 5)
3937
; REGALLOC-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
4038
; REGALLOC-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR killed $sgpr4, 2, $vgpr63, implicit-def $sgpr4_sgpr5, implicit $sgpr4_sgpr5
4139
; REGALLOC-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr5, 3, $vgpr63, implicit $sgpr4_sgpr5
@@ -47,27 +45,27 @@ define i32 @prolog_spill(i32 %arg0, i32 %arg1, i32 %arg2) {
4745
; REGALLOC-NEXT: bb.2.bb.1:
4846
; REGALLOC-NEXT: successors: %bb.4(0x80000000)
4947
; REGALLOC-NEXT: {{ $}}
50-
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.4, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.4, addrspace 5)
48+
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.3, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.3, addrspace 5)
5149
; REGALLOC-NEXT: renamable $sgpr4 = S_MOV_B32 10
5250
; REGALLOC-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, killed $sgpr4, 0, implicit $exec
53-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.6, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.6, addrspace 5)
51+
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.5, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.5, addrspace 5)
5452
; REGALLOC-NEXT: S_BRANCH %bb.4
5553
; REGALLOC-NEXT: {{ $}}
5654
; REGALLOC-NEXT: bb.3.bb.2:
5755
; REGALLOC-NEXT: successors: %bb.1(0x80000000)
5856
; REGALLOC-NEXT: {{ $}}
59-
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.5, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.5, addrspace 5)
57+
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.4, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.4, addrspace 5)
6058
; REGALLOC-NEXT: renamable $sgpr4 = S_MOV_B32 20
6159
; REGALLOC-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, killed $sgpr4, 0, implicit $exec
62-
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.3, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
60+
; REGALLOC-NEXT: SI_SPILL_V32_SAVE killed $vgpr0, %stack.6, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.6, addrspace 5)
6361
; REGALLOC-NEXT: S_BRANCH %bb.1
6462
; REGALLOC-NEXT: {{ $}}
6563
; REGALLOC-NEXT: bb.4.bb.3:
6664
; REGALLOC-NEXT: $vgpr63 = SI_SPILL_WWM_V32_RESTORE %stack.2, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
6765
; REGALLOC-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR $vgpr63, 2, implicit-def $sgpr4_sgpr5
6866
; REGALLOC-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR killed $vgpr63, 3
6967
; REGALLOC-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
70-
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.6, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.6, addrspace 5)
68+
; REGALLOC-NEXT: $vgpr0 = SI_SPILL_V32_RESTORE %stack.5, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.5, addrspace 5)
7169
; REGALLOC-NEXT: renamable $vgpr0 = V_LSHL_ADD_U32_e64 killed $vgpr0, 2, $vgpr0, implicit $exec
7270
; REGALLOC-NEXT: SI_RETURN implicit killed $vgpr0
7371
bb.0:

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