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Merged main:5d4a0d54b5269bad1410e6db957836fe98634069 into amd-gfx:2577f0f72239
Local branch amd-gfx 2577f0f Merged main:a1d31caa8c53082d12f580122dcf2b2ff8285e78 into amd-gfx:a0b628df54bb Remote branch main 5d4a0d5 [InstCombine] Teach takeLog2 about right shifts, truncation and bitwise-and
2 parents 2577f0f + 5d4a0d5 commit 7dad817

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14 files changed

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lines changed

14 files changed

+187
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lines changed

‎clang/include/clang/Sema/SemaInternal.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ inline InheritableAttr *getDLLAttr(Decl *D) {
5858
}
5959

6060
/// Retrieve the depth and index of a template parameter.
61-
inline std::pair<unsigned, unsigned> getDepthAndIndex(NamedDecl *ND) {
61+
inline std::pair<unsigned, unsigned> getDepthAndIndex(const NamedDecl *ND) {
6262
if (const auto *TTP = dyn_cast<TemplateTypeParmDecl>(ND))
6363
return std::make_pair(TTP->getDepth(), TTP->getIndex());
6464

‎libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,10 @@
1616
// clang: error: unable to execute command: Illegal instruction: 4
1717
// XFAIL: target=x86_64-apple-macosx13.7
1818

19+
// FIXME: The following issue occurs on Windows to Armv7 Ubuntu Linux:
20+
// Assertion failed: N->getValueType(0) == MVT::v1i1 && "Expected v1i1 type"
21+
// XFAIL: target=armv7-unknown-linux-gnueabihf
22+
1923
// <experimental/simd>
2024
//
2125
// [simd.class]

‎llvm/docs/ReleaseNotes.md‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -221,6 +221,8 @@ Changes to the X86 Backend
221221

222222
* Supported ISA of `SM4(EVEX)`.
223223

224+
* Supported ISA of `MSR_IMM`.
225+
224226
Changes to the OCaml bindings
225227
-----------------------------
226228

‎llvm/include/llvm/Config/llvm-config.h.cmake‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 516208
19+
#define LLVM_MAIN_REVISION 516212
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

‎llvm/lib/Target/X86/X86InstrSystem.td‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -466,7 +466,10 @@ multiclass Urdwrmsr<Map rrmap, string suffix> {
466466
"urdmsr\t{$imm, $dst|$dst, $imm}",
467467
[(set GR64:$dst, (int_x86_urdmsr i64immSExt32_su:$imm))]>,
468468
T_MAP7, VEX, XD, NoCD8;
469-
}
469+
def RDMSRri#suffix : Ii32<0xf6, MRM0r, (outs GR64:$dst), (ins i64i32imm:$imm),
470+
"rdmsr\t{$imm, $dst|$dst, $imm}", []>,
471+
T_MAP7, VEX, XD, NoCD8;
472+
}
470473
let mayStore = 1 in {
471474
let OpMap = rrmap in
472475
def UWRMSRrr#suffix : I<0xf8, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
@@ -476,6 +479,9 @@ multiclass Urdwrmsr<Map rrmap, string suffix> {
476479
"uwrmsr\t{$src, $imm|$imm, $src}",
477480
[(int_x86_uwrmsr i64immSExt32_su:$imm, GR64:$src)]>,
478481
T_MAP7, VEX, XS, NoCD8;
482+
def WRMSRNSir#suffix : Ii32<0xf6, MRM0r, (outs), (ins GR64:$src, i64i32imm:$imm),
483+
"wrmsrns\t{$src, $imm|$imm, $src}",
484+
[]>, T_MAP7, VEX, XS, NoCD8;
479485
}
480486
}
481487

‎llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1427,6 +1427,18 @@ static Value *takeLog2(IRBuilderBase &Builder, Value *Op, unsigned Depth,
14271427
if (Value *LogX = takeLog2(Builder, X, Depth, AssumeNonZero, DoFold))
14281428
return IfFold([&]() { return Builder.CreateZExt(LogX, Op->getType()); });
14291429

1430+
// log2(trunc x) -> trunc log2(X)
1431+
// FIXME: Require one use?
1432+
if (match(Op, m_Trunc(m_Value(X)))) {
1433+
auto *TI = cast<TruncInst>(Op);
1434+
if (AssumeNonZero || TI->hasNoUnsignedWrap())
1435+
if (Value *LogX = takeLog2(Builder, X, Depth, AssumeNonZero, DoFold))
1436+
return IfFold([&]() {
1437+
return Builder.CreateTrunc(LogX, Op->getType(), "",
1438+
/*IsNUW=*/TI->hasNoUnsignedWrap());
1439+
});
1440+
}
1441+
14301442
// log2(X << Y) -> log2(X) + Y
14311443
// FIXME: Require one use unless X is 1?
14321444
if (match(Op, m_Shl(m_Value(X), m_Value(Y)))) {
@@ -1437,6 +1449,24 @@ static Value *takeLog2(IRBuilderBase &Builder, Value *Op, unsigned Depth,
14371449
return IfFold([&]() { return Builder.CreateAdd(LogX, Y); });
14381450
}
14391451

1452+
// log2(X >>u Y) -> log2(X) - Y
1453+
// FIXME: Require one use?
1454+
if (match(Op, m_LShr(m_Value(X), m_Value(Y)))) {
1455+
auto *PEO = cast<PossiblyExactOperator>(Op);
1456+
if (AssumeNonZero || PEO->isExact())
1457+
if (Value *LogX = takeLog2(Builder, X, Depth, AssumeNonZero, DoFold))
1458+
return IfFold([&]() { return Builder.CreateSub(LogX, Y); });
1459+
}
1460+
1461+
// log2(X & Y) -> either log2(X) or log2(Y)
1462+
// This requires `AssumeNonZero` as `X & Y` may be zero when X != Y.
1463+
if (AssumeNonZero && match(Op, m_And(m_Value(X), m_Value(Y)))) {
1464+
if (Value *LogX = takeLog2(Builder, X, Depth, AssumeNonZero, DoFold))
1465+
return IfFold([&]() { return LogX; });
1466+
if (Value *LogY = takeLog2(Builder, Y, Depth, AssumeNonZero, DoFold))
1467+
return IfFold([&]() { return LogY; });
1468+
}
1469+
14401470
// log2(Cond ? X : Y) -> Cond ? log2(X) : log2(Y)
14411471
// FIXME: Require one use?
14421472
if (SelectInst *SI = dyn_cast<SelectInst>(Op))

‎llvm/test/MC/Disassembler/X86/apx/msr-imm.txt‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
2+
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
3+
4+
# ATT: rdmsr $123, %r9
5+
# INTEL: rdmsr r9, 123
6+
0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00
7+
8+
# ATT: rdmsr $123, %r19
9+
# INTEL: rdmsr r19, 123
10+
0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00
11+
12+
# ATT: wrmsrns %r9, $123
13+
# INTEL: wrmsrns 123, r9
14+
0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00
15+
16+
# ATT: wrmsrns %r19, $123
17+
# INTEL: wrmsrns 123, r19
18+
0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00

‎llvm/test/MC/Disassembler/X86/msrimm-64.txt‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
2+
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
3+
4+
# ATT: rdmsr $123, %r9
5+
# INTEL: rdmsr r9, 123
6+
0xc4,0xc7,0x7b,0xf6,0xc1,0x7b,0x00,0x00,0x00
7+
8+
# ATT: wrmsrns %r9, $123
9+
# INTEL: wrmsrns 123, r9
10+
0xc4,0xc7,0x7a,0xf6,0xc1,0x7b,0x00,0x00,0x00

‎llvm/test/MC/X86/apx/msrimm-att.s‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
2+
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
3+
4+
# ERROR-COUNT-4: error:
5+
# ERROR-NOT: error:
6+
7+
## rdmsr
8+
9+
// CHECK: {evex} rdmsr $123, %r9
10+
// CHECK: encoding: [0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
11+
{evex} rdmsr $123, %r9
12+
13+
// CHECK: rdmsr $123, %r19
14+
// CHECK: encoding: [0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
15+
rdmsr $123, %r19
16+
17+
## wrmsrns
18+
19+
# CHECK: {evex} wrmsrns %r9, $123
20+
# CHECK: encoding: [0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
21+
{evex} wrmsrns %r9, $123
22+
23+
# CHECK: wrmsrns %r19, $123
24+
# CHECK: encoding: [0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
25+
wrmsrns %r19, $123

‎llvm/test/MC/X86/apx/msrimm-intel.s‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
2+
3+
## urdmsr
4+
5+
# CHECK: {evex} rdmsr r9, 123
6+
# CHECK: encoding: [0x62,0xd7,0x7f,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
7+
{evex} rdmsr r9, 123
8+
9+
# CHECK: rdmsr r19, 123
10+
# CHECK: encoding: [0x62,0xff,0x7f,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
11+
rdmsr r19, 123
12+
13+
## uwrmsr
14+
15+
# CHECK: {evex} wrmsrns 123, r9
16+
# CHECK: encoding: [0x62,0xd7,0x7e,0x08,0xf6,0xc1,0x7b,0x00,0x00,0x00]
17+
{evex} wrmsrns 123, r9
18+
19+
# CHECK: wrmsrns 123, r19
20+
# CHECK: encoding: [0x62,0xff,0x7e,0x08,0xf6,0xc3,0x7b,0x00,0x00,0x00]
21+
wrmsrns 123, r19

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