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Commit b0290dd

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Merged main:e138f7831e62 into amd-gfx:4f96d7935439
Local branch amd-gfx 4f96d79 Merged main:f06756f50e1f into amd-gfx:d2017495f111 Remote branch main e138f78 [RISCV] Remove unnecessary let BaseInstr from Xsfvcp pseudoinstructions. NFC
2 parents 4f96d79 + e138f78 commit b0290dd

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-7
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2 files changed

+1
-7
lines changed

llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
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/* Indicate that this is LLVM compiled from the amd-gfx branch. */
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#define LLVM_HAVE_BRANCH_AMD_GFX
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#define LLVM_MAIN_REVISION 522203
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#define LLVM_MAIN_REVISION 522204
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/* Define if LLVM_ENABLE_DUMP is enabled */
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#cmakedefine LLVM_ENABLE_DUMP

llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -238,7 +238,6 @@ class VPseudoVC_X<Operand OpClass, DAGOperand RS1Class> :
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let HasVLOp = 1;
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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class VPseudoVC_XV<Operand OpClass, VReg RS2Class, DAGOperand RS1Class> :
@@ -251,7 +250,6 @@ class VPseudoVC_XV<Operand OpClass, VReg RS2Class, DAGOperand RS1Class> :
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let HasVLOp = 1;
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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class VPseudoVC_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -265,7 +263,6 @@ class VPseudoVC_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
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let HasVLOp = 1;
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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class VPseudoVC_V_X<Operand OpClass, VReg RDClass, DAGOperand RS1Class> :
@@ -278,7 +275,6 @@ class VPseudoVC_V_X<Operand OpClass, VReg RDClass, DAGOperand RS1Class> :
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let HasVLOp = 1;
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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class VPseudoVC_V_XV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -292,7 +288,6 @@ class VPseudoVC_V_XV<Operand OpClass, VReg RDClass, VReg RS2Class,
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let HasVLOp = 1;
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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class VPseudoVC_V_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -307,7 +302,6 @@ class VPseudoVC_V_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
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let HasSEWOp = 1;
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let hasSideEffects = 0;
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let Constraints = "$rd = $rs3";
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let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
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}
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multiclass VPseudoVC_X<LMULInfo m, DAGOperand RS1Class,

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