Revert "[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (llvm#120588)"

dstutt · dstutt · commit d71fa76be0d3 · 2025-01-06T15:49:18.000Z
This reverts commit d3508cc. Change-Id: Idc3b9497c81779055fe226a2705bcbe25cd70889
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -2394,9 +2394,6 @@ bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {
            Subtarget->hasScalarCompareEq64();
   }
 
-  if ((VT == MVT::f16 || VT == MVT::f32) && Subtarget->hasSALUFloatInsts())
-    return true;
-
   return false;
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
@@ -297,7 +297,10 @@ define amdgpu_kernel void @uniform_conditional_min_long_forward_vcnd_branch(ptr
 ; GFX12-NEXT:    s_load_b32 s0, s[4:5], 0x2c
 ; GFX12-NEXT:    s_wait_kmcnt 0x0
 ; GFX12-NEXT:    s_cmp_eq_f32 s0, 0
-; GFX12-NEXT:    s_cbranch_scc0 .LBB2_1
+; GFX12-NEXT:    s_cselect_b32 s1, -1, 0
+; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX12-NEXT:    s_and_b32 vcc_lo, exec_lo, s1
+; GFX12-NEXT:    s_cbranch_vccz .LBB2_1
 ; GFX12-NEXT:  ; %bb.3: ; %bb0
 ; GFX12-NEXT:    s_getpc_b64 s[2:3]
 ; GFX12-NEXT:  .Lpost_getpc2:
diff --git a/llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll b/llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll

Original file line number	Diff line number	Diff line change
`@@ -2394,9 +2394,6 @@ bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {`
`2394`	`2394`	`Subtarget->hasScalarCompareEq64();`
`2395`	`2395`	`}`
`2396`	`2396`
`2397`		`- if ((VT == MVT::f16 \|\| VT == MVT::f32) && Subtarget->hasSALUFloatInsts())`
`2398`		`- return true;`
`2399`		`-`
`2400`	`2397`	`return false;`
`2401`	`2398`	`}`
`2402`	`2399`