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armv7/8 cache: add up_get_xcache_size() support
Signed-off-by: chenrun1 <[email protected]>
1 parent 09da8fb commit 22d1059

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9 files changed

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-0
lines changed

9 files changed

+406
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lines changed

‎arch/arm/src/armv7-a/arm_cache.c

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,32 @@ size_t up_get_icache_linesize(void)
6363
return clsize;
6464
}
6565

66+
/****************************************************************************
67+
* Name: up_get_icache_size
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*
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* Description:
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* Get icache size
71+
*
72+
* Input Parameters:
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* None
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*
75+
* Returned Value:
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* Cache size
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*
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****************************************************************************/
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size_t up_get_icache_size(void)
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{
82+
static uint32_t csize;
83+
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if (csize == 0)
85+
{
86+
csize = MAX(cp15_icache_size(), l2cc_size());
87+
}
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return csize;
90+
}
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6692
/****************************************************************************
6793
* Name: up_invalidate_icache_all
6894
*
@@ -172,6 +198,32 @@ size_t up_get_dcache_linesize(void)
172198
return clsize;
173199
}
174200

201+
/****************************************************************************
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* Name: up_get_dcache_size
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*
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* Description:
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* Get dcache size
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Cache size
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*
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****************************************************************************/
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size_t up_get_dcache_size(void)
216+
{
217+
static uint32_t csize;
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if (csize == 0)
220+
{
221+
csize = MAX(cp15_dcache_size(), l2cc_size());
222+
}
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return csize;
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}
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175227
/****************************************************************************
176228
* Name: up_invalidate_dcache
177229
*

‎arch/arm/src/armv7-a/arm_l2cc_pl310.c

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -415,6 +415,25 @@ uint32_t l2cc_linesize(void)
415415
return PL310_CACHE_LINE_SIZE;
416416
}
417417

418+
/****************************************************************************
419+
* Name: l2cc_size
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*
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* Description:
422+
* Get L2CC-P310 L2 cache size
423+
*
424+
* Input Parameters:
425+
* None
426+
*
427+
* Returned Value:
428+
* L2 cache size
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*
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****************************************************************************/
431+
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uint32_t l2cc_size(void)
433+
{
434+
return PL310_CACHE_SIZE;
435+
}
436+
418437
/****************************************************************************
419438
* Name: l2cc_enable
420439
*

‎arch/arm/src/armv7-a/l2cc.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,22 @@ void arm_l2ccinitialize(void);
8686

8787
uint32_t l2cc_linesize(void);
8888

89+
/****************************************************************************
90+
* Name: l2cc_size
91+
*
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* Description:
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* Get L2CC-P310 L2 cache size
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*
95+
* Input Parameters:
96+
* None
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*
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* Returned Value:
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* L2 cache size
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*
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****************************************************************************/
102+
103+
uint32_t l2cc_size(void);
104+
89105
/****************************************************************************
90106
* Name: l2cc_enable
91107
*
@@ -245,6 +261,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
245261
* compilation in one place.
246262
*/
247263

264+
# define l2cc_size() 0
248265
# define l2cc_linesize() 0
249266
# define l2cc_enable()
250267
# define l2cc_disable()

‎arch/arm/src/armv7-m/arm_cache.c

Lines changed: 95 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -142,6 +142,49 @@ static size_t up_get_cache_linesize(bool icache)
142142

143143
return 1 << sshift;
144144
}
145+
146+
/****************************************************************************
147+
* Name: up_get_cache_size
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*
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* Description:
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* Get cache size
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*
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* Input Parameters:
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* level - Difference between icache and dcache.
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*
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* Returned Value:
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* Cache size
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*
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****************************************************************************/
159+
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static size_t up_get_cache_size(bool icache)
161+
{
162+
uint32_t ccsidr;
163+
uint32_t csselr;
164+
uint32_t sshift;
165+
uint32_t sets;
166+
uint32_t ways;
167+
uint32_t line;
168+
169+
csselr = getreg32(NVIC_CSSELR);
170+
171+
if (icache)
172+
{
173+
csselr = (csselr & ~NVIC_CSSELR_IND) | NVIC_CSSELR_IND_ICACHE;
174+
}
175+
else
176+
{
177+
csselr = (csselr & ~NVIC_CSSELR_IND) | NVIC_CSSELR_IND_DCACHE;
178+
}
179+
180+
ccsidr = getreg32(NVIC_CCSIDR);
181+
sets = CCSIDR_SETS(ccsidr) + 1;
182+
ways = CCSIDR_WAYS(ccsidr) + 1;
183+
sshift = CCSIDR_LSSHIFT(ccsidr) + 4; /* log2(cache-line-size-in-bytes) */
184+
line = 1 << sshift;
185+
186+
return sets * ways * line;
187+
}
145188
#endif
146189

147190
/****************************************************************************
@@ -174,6 +217,32 @@ size_t up_get_icache_linesize(void)
174217

175218
return clsize;
176219
}
220+
221+
/****************************************************************************
222+
* Name: up_get_icache_size
223+
*
224+
* Description:
225+
* Get icache size
226+
*
227+
* Input Parameters:
228+
* None
229+
*
230+
* Returned Value:
231+
* Cache size
232+
*
233+
****************************************************************************/
234+
235+
size_t up_get_icache_size(void)
236+
{
237+
static uint32_t csize;
238+
239+
if (csize == 0)
240+
{
241+
csize = up_get_cache_size(true);
242+
}
243+
244+
return csize;
245+
}
177246
#endif
178247

179248
/****************************************************************************
@@ -367,6 +436,32 @@ size_t up_get_dcache_linesize(void)
367436

368437
return clsize;
369438
}
439+
440+
/****************************************************************************
441+
* Name: up_get_dcache_size
442+
*
443+
* Description:
444+
* Get icache size
445+
*
446+
* Input Parameters:
447+
* None
448+
*
449+
* Returned Value:
450+
* Cache size
451+
*
452+
****************************************************************************/
453+
454+
size_t up_get_dcache_size(void)
455+
{
456+
static uint32_t csize;
457+
458+
if (csize == 0)
459+
{
460+
csize = up_get_cache_size(false);
461+
}
462+
463+
return csize;
464+
}
370465
#endif
371466

372467
/****************************************************************************

‎arch/arm/src/armv7-r/arm_cache.c

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,32 @@ size_t up_get_icache_linesize(void)
6363
return clsize;
6464
}
6565

66+
/****************************************************************************
67+
* Name: up_get_icache_size
68+
*
69+
* Description:
70+
* Get icache size
71+
*
72+
* Input Parameters:
73+
* None
74+
*
75+
* Returned Value:
76+
* Cache size
77+
*
78+
****************************************************************************/
79+
80+
size_t up_get_icache_size(void)
81+
{
82+
static uint32_t csize;
83+
84+
if (csize == 0)
85+
{
86+
csize = MAX(cp15_icache_size(), l2cc_size());
87+
}
88+
89+
return csize;
90+
}
91+
6692
/****************************************************************************
6793
* Name: up_invalidate_icache_all
6894
*
@@ -172,6 +198,32 @@ size_t up_get_dcache_linesize(void)
172198
return clsize;
173199
}
174200

201+
/****************************************************************************
202+
* Name: up_get_dcache_size
203+
*
204+
* Description:
205+
* Get dcache size
206+
*
207+
* Input Parameters:
208+
* None
209+
*
210+
* Returned Value:
211+
* Cache size
212+
*
213+
****************************************************************************/
214+
215+
size_t up_get_dcache_size(void)
216+
{
217+
static uint32_t csize;
218+
219+
if (csize == 0)
220+
{
221+
csize = MAX(cp15_dcache_size(), l2cc_size());
222+
}
223+
224+
return csize;
225+
}
226+
175227
/****************************************************************************
176228
* Name: up_invalidate_dcache
177229
*

‎arch/arm/src/armv7-r/arm_l2cc_pl310.c

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -415,6 +415,25 @@ uint32_t l2cc_linesize(void)
415415
return PL310_CACHE_LINE_SIZE;
416416
}
417417

418+
/****************************************************************************
419+
* Name: l2cc_size
420+
*
421+
* Description:
422+
* Get L2CC-P310 L2 cache size
423+
*
424+
* Input Parameters:
425+
* None
426+
*
427+
* Returned Value:
428+
* L2 cache size
429+
*
430+
****************************************************************************/
431+
432+
uint32_t l2cc_size(void)
433+
{
434+
return PL310_CACHE_SIZE;
435+
}
436+
418437
/****************************************************************************
419438
* Name: l2cc_enable
420439
*

‎arch/arm/src/armv7-r/l2cc.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,22 @@ void arm_l2ccinitialize(void);
8686

8787
uint32_t l2cc_linesize(void);
8888

89+
/****************************************************************************
90+
* Name: l2cc_size
91+
*
92+
* Description:
93+
* Get L2CC-P310 L2 cache size
94+
*
95+
* Input Parameters:
96+
* None
97+
*
98+
* Returned Value:
99+
* L2 cache size
100+
*
101+
****************************************************************************/
102+
103+
uint32_t l2cc_size(void);
104+
89105
/****************************************************************************
90106
* Name: l2cc_enable
91107
*
@@ -245,6 +261,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
245261
* compilation in one place.
246262
*/
247263

264+
# define l2cc_size() 0
248265
# define l2cc_linesize() 0
249266
# define l2cc_enable()
250267
# define l2cc_disable()

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