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include/nuttx.h: replace all the align macros to nuttx version
1. add IS_ALIGNED() definitions for NuttX; 2. replace all the ALIGN_UP() and ALIGN_DOWN() to use common align implementation; Signed-off-by: Bowen Wang <[email protected]>
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32 files changed

+112
-219
lines changed

32 files changed

+112
-219
lines changed

‎arch/arm/src/cxd56xx/cxd56_udmac.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -34,21 +34,14 @@
3434
#include <nuttx/irq.h>
3535
#include <nuttx/arch.h>
3636
#include <nuttx/mutex.h>
37+
#include <nuttx/nuttx.h>
3738
#include <nuttx/semaphore.h>
3839

3940
#include "arm_internal.h"
4041
#include "cxd56_clock.h"
4142
#include "hardware/cxd56_udmac.h"
4243
#include "cxd56_udmac.h"
4344

44-
/****************************************************************************
45-
* Pre-processor Definitions
46-
****************************************************************************/
47-
48-
#define ALIGN_MASK(s) ((1 << s) - 1)
49-
#define ALIGN_DOWN(v, m) ((v) & ~m)
50-
#define ALIGN_UP(v, m) (((v) + (m)) & ~m)
51-
5245
/****************************************************************************
5346
* Private Types
5447
****************************************************************************/
@@ -434,7 +427,7 @@ void cxd56_rxudmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
434427
*/
435428

436429
xfersize = (1 << shift);
437-
nbytes = ALIGN_DOWN(nbytes, mask);
430+
nbytes = ALIGN_DOWN_MASK(nbytes, mask);
438431
DEBUGASSERT(nbytes > 0);
439432

440433
/* Save the configuration (for cxd56_udmastart()). */
@@ -531,7 +524,7 @@ void cxd56_txudmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
531524
*/
532525

533526
xfersize = (1 << shift);
534-
nbytes = ALIGN_DOWN(nbytes, mask);
527+
nbytes = ALIGN_DOWN_MASK(nbytes, mask);
535528
DEBUGASSERT(nbytes > 0);
536529

537530
/* Save the configuration (for cxd56_udmastart()). */

‎arch/arm/src/efm32/efm32_dma.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -34,21 +34,14 @@
3434
#include <nuttx/irq.h>
3535
#include <nuttx/arch.h>
3636
#include <nuttx/mutex.h>
37+
#include <nuttx/nuttx.h>
3738
#include <nuttx/semaphore.h>
3839

3940
#include "arm_internal.h"
4041
#include "hardware/efm32_cmu.h"
4142
#include "hardware/efm32_dma.h"
4243
#include "efm32_dma.h"
4344

44-
/****************************************************************************
45-
* Pre-processor Definitions
46-
****************************************************************************/
47-
48-
#define ALIGN_MASK(s) ((1 << s) - 1)
49-
#define ALIGN_DOWN(v,m) ((v) & ~m)
50-
#define ALIGN_UP(v,m) (((v) + (m)) & ~m)
51-
5245
/****************************************************************************
5346
* Private Types
5447
****************************************************************************/
@@ -466,7 +459,7 @@ void efm32_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
466459
*/
467460

468461
xfersize = (1 << shift);
469-
nbytes = ALIGN_DOWN(nbytes, mask);
462+
nbytes = ALIGN_DOWN_MASK(nbytes, mask);
470463
DEBUGASSERT(nbytes > 0);
471464

472465
/* Save the configuration (for efm32_dmastart()). */
@@ -563,7 +556,7 @@ void efm32_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
563556
*/
564557

565558
xfersize = (1 << shift);
566-
nbytes = ALIGN_DOWN(nbytes, mask);
559+
nbytes = ALIGN_DOWN_MASK(nbytes, mask);
567560
DEBUGASSERT(nbytes > 0);
568561

569562
/* Save the configuration (for efm32_dmastart()). */

‎arch/arm/src/nrf52/nrf52_qspi.c

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include <nuttx/arch.h>
3030
#include <nuttx/kmalloc.h>
3131
#include <nuttx/mutex.h>
32+
#include <nuttx/nuttx.h>
3233
#include <nuttx/semaphore.h>
3334
#include <arch/board/board.h>
3435

@@ -53,13 +54,6 @@
5354

5455
#define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0)
5556

56-
/* Ensure that the DMA buffers are word-aligned. */
57-
58-
#define ALIGN_SHIFT 2
59-
#define ALIGN_MASK 3
60-
#define ALIGN_UP(n) (((n)+ALIGN_MASK) & ~ALIGN_MASK)
61-
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
62-
6357
/****************************************************************************
6458
* Private Types
6559
****************************************************************************/
@@ -692,7 +686,9 @@ static int nrf52_qspi_memory(struct qspi_dev_s *dev,
692686

693687
static void *nrf52_qspi_alloc(struct qspi_dev_s *dev, size_t buflen)
694688
{
695-
return kmm_malloc(ALIGN_UP(buflen));
689+
/* Ensure that the DMA buffers are word-aligned. */
690+
691+
return kmm_malloc(ALIGN_UP(buflen, 4));
696692
}
697693

698694
/****************************************************************************

‎arch/arm/src/nrf53/nrf53_qspi.c

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include <nuttx/arch.h>
3030
#include <nuttx/kmalloc.h>
3131
#include <nuttx/mutex.h>
32+
#include <nuttx/nuttx.h>
3233
#include <nuttx/semaphore.h>
3334
#include <arch/board/board.h>
3435

@@ -63,13 +64,6 @@
6364

6465
#define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0)
6566

66-
/* Ensure that the DMA buffers are word-aligned. */
67-
68-
#define ALIGN_SHIFT 2
69-
#define ALIGN_MASK 3
70-
#define ALIGN_UP(n) (((n)+ALIGN_MASK) & ~ALIGN_MASK)
71-
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
72-
7367
/****************************************************************************
7468
* Private Types
7569
****************************************************************************/
@@ -702,7 +696,9 @@ static int nrf53_qspi_memory(struct qspi_dev_s *dev,
702696

703697
static void *nrf53_qspi_alloc(struct qspi_dev_s *dev, size_t buflen)
704698
{
705-
return kmm_malloc(ALIGN_UP(buflen));
699+
/* Ensure that the DMA buffers are word-aligned. */
700+
701+
return kmm_malloc(ALIGN_UP(buflen, 4));
706702
}
707703

708704
/****************************************************************************

‎arch/arm/src/s32k3xx/s32k3xx_qspi.c

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@
4646
#include <nuttx/cache.h>
4747
#include <nuttx/kmalloc.h>
4848
#include <nuttx/mutex.h>
49+
#include <nuttx/nuttx.h>
4950
#include <nuttx/spi/qspi.h>
5051

5152
#include "arm_internal.h"
@@ -69,13 +70,6 @@
6970

7071
#define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0)
7172

72-
/* Ensure that the DMA buffers are word-aligned. */
73-
74-
#define ALIGN_SHIFT 2
75-
#define ALIGN_MASK 3
76-
#define ALIGN_UP(n) (((n)+ALIGN_MASK) & ~ALIGN_MASK)
77-
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
78-
7973
/* LUT entries used for various command sequences */
8074
#define QSPI_LUT_READ 0U /* Quad Output read */
8175
#define QSPI_LUT_WRITE 1U /* Quad write */
@@ -1402,9 +1396,10 @@ static void *qspi_alloc(struct qspi_dev_s *dev, size_t buflen)
14021396
/* Here we exploit the carnal knowledge the kmm_malloc() will return memory
14031397
* aligned to 64-bit addresses. The buffer length must be large enough to
14041398
* hold the rested buflen in units a 32-bits.
1399+
* Ensure that the DMA buffers are word-aligned.
14051400
*/
14061401

1407-
return kmm_malloc(ALIGN_UP(buflen));
1402+
return kmm_malloc(ALIGN_UP(buflen, 4));
14081403
}
14091404

14101405
/****************************************************************************

‎arch/arm/src/sam34/sam_cmcc.c

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@
2828
#include <stdint.h>
2929
#include <assert.h>
3030

31+
#include <nuttx/nuttx.h>
32+
3133
#include "arm_internal.h"
3234
#include "hardware/sam_cmcc.h"
3335
#include "sam_cmcc.h"
@@ -52,9 +54,6 @@
5254
# error Unknown cache line size
5355
#endif
5456

55-
#define ALIGN_UP(a) (((a)+CMCC_MASK) & ~CMCC_MASK)
56-
#define ALIGN_DOWN(a) ((a) & ~CMCC_MASK)
57-
5857
/****************************************************************************
5958
* Private Data
6059
****************************************************************************/
@@ -138,8 +137,8 @@ void sam_cmcc_invalidate(uintptr_t start, uintptr_t end)
138137
* to be invalidated.
139138
*/
140139

141-
start = ALIGN_DOWN(start);
142-
end = ALIGN_UP(end);
140+
start = ALIGN_DOWN_MASK(start, CMCC_MASK);
141+
end = ALIGN_UP_MASK(end, CMCC_MASK);
143142
size = end - start + 1;
144143

145144
/* If this is a large region (as big as the cache), then just invalidate

‎arch/arm/src/sama5/sam_qspi.c

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@
4040
#include <nuttx/clock.h>
4141
#include <nuttx/kmalloc.h>
4242
#include <nuttx/mutex.h>
43+
#include <nuttx/nuttx.h>
4344
#include <nuttx/semaphore.h>
4445
#include <nuttx/spi/qspi.h>
4546

@@ -119,15 +120,6 @@
119120

120121
#define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0)
121122

122-
/* The SAMA5x QSPI driver insists that transfers be performed in multiples
123-
* of 32-bits. The alignment requirement only applies to RX DMA data.
124-
*/
125-
126-
#define ALIGN_SHIFT 2
127-
#define ALIGN_MASK 3
128-
#define ALIGN_UP(n) (((n)+ALIGN_MASK) & ~ALIGN_MASK)
129-
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
130-
131123
/* Debug ********************************************************************/
132124

133125
/* Check if QSPI debug is enabled */
@@ -1613,8 +1605,8 @@ static int qspi_memory(struct qspi_dev_s *dev,
16131605

16141606
if (priv->candma &&
16151607
meminfo->buflen > CONFIG_SAMA5_QSPI_DMATHRESHOLD &&
1616-
IS_ALIGNED((uintptr_t)meminfo->buffer) &&
1617-
IS_ALIGNED(meminfo->buflen))
1608+
IS_ALIGNED((uintptr_t)meminfo->buffer, 4) &&
1609+
IS_ALIGNED(meminfo->buflen, 4))
16181610
{
16191611
return qspi_memory_dma(priv, meminfo);
16201612
}
@@ -1648,7 +1640,11 @@ static void *qspi_alloc(struct qspi_dev_s *dev, size_t buflen)
16481640
* enough to hold the rested buflen in units a 32-bits.
16491641
*/
16501642

1651-
return kmm_malloc(ALIGN_UP(buflen));
1643+
/* The SAMA5x QSPI driver insists that transfers be performed in multiples
1644+
* of 32-bits. The alignment requirement only applies to RX DMA data.
1645+
*/
1646+
1647+
return kmm_malloc(ALIGN_UP(buflen, 4));
16521648
}
16531649

16541650
/****************************************************************************

‎arch/arm/src/samd5e5/sam_cmcc.c

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@
2828
#include <stdint.h>
2929
#include <assert.h>
3030

31+
#include <nuttx/nuttx.h>
32+
3133
#include "arm_internal.h"
3234
#include "hardware/sam_cmcc.h"
3335
#include "sam_cmcc.h"
@@ -52,9 +54,6 @@
5254
# error Unknown cache line size
5355
#endif
5456

55-
#define ALIGN_UP(a) (((a)+CMCC_MASK) & ~CMCC_MASK)
56-
#define ALIGN_DOWN(a) ((a) & ~CMCC_MASK)
57-
5857
/****************************************************************************
5958
* Private Data
6059
****************************************************************************/
@@ -138,8 +137,8 @@ void sam_cmcc_invalidate(uintptr_t start, uintptr_t end)
138137
* to be invalidated.
139138
*/
140139

141-
start = ALIGN_DOWN(start);
142-
end = ALIGN_UP(end);
140+
start = ALIGN_DOWN_MASK(start, CMCC_MASK);
141+
end = ALIGN_UP_MASK(end, CMCC_MASK);
143142
size = end - start + 1;
144143

145144
/* If this is a large region (as big as the cache), then just invalidate

‎arch/arm/src/samv7/sam_qspi.c

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -119,15 +119,6 @@
119119

120120
#define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0)
121121

122-
/* The SAMV7x QSPI driver insists that transfers be performed in multiples
123-
* of 32-bits. The alignment requirement only applies to RX DMA data.
124-
*/
125-
126-
#define ALIGN_SHIFT 2
127-
#define ALIGN_MASK 3
128-
#define ALIGN_UP(n) (((n)+ALIGN_MASK) & ~ALIGN_MASK)
129-
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
130-
131122
/* Debug ********************************************************************/
132123

133124
/* Check if QSPI debug is enabled */
@@ -1558,8 +1549,8 @@ static int qspi_memory(struct qspi_dev_s *dev,
15581549

15591550
if (priv->candma &&
15601551
meminfo->buflen > CONFIG_SAMV7_QSPI_DMATHRESHOLD &&
1561-
IS_ALIGNED((uintptr_t)meminfo->buffer) &&
1562-
IS_ALIGNED(meminfo->buflen))
1552+
IS_ALIGNED((uintptr_t)meminfo->buffer, 4) &&
1553+
IS_ALIGNED(meminfo->buflen, 4))
15631554
{
15641555
return qspi_memory_dma(priv, meminfo);
15651556
}
@@ -1593,7 +1584,11 @@ static void *qspi_alloc(struct qspi_dev_s *dev, size_t buflen)
15931584
* enough to hold the rested buflen in units a 32-bits.
15941585
*/
15951586

1596-
return kmm_malloc(ALIGN_UP(buflen));
1587+
/* The SAMV7x QSPI driver insists that transfers be performed in multiples
1588+
* of 32-bits. The alignment requirement only applies to RX DMA data.
1589+
*/
1590+
1591+
return kmm_malloc(ALIGN_UP(buflen, 4));
15971592
}
15981593

15991594
/****************************************************************************

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