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fjpanagjerpelea
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stm32_f7/h7_eth: Added error handling for abnormal interrupts.
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2 files changed

+34
-10
lines changed

2 files changed

+34
-10
lines changed

arch/arm/src/stm32f7/stm32_ethernet.c

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2117,16 +2117,13 @@ static void stm32_interrupt_work(void *arg)
21172117
stm32_putreg(ETH_DMAINT_NIS, STM32_ETH_DMASR);
21182118
}
21192119

2120-
/* Handle error interrupt only if CONFIG_DEBUG_NET is eanbled */
2121-
2122-
#ifdef CONFIG_DEBUG_NET
21232120
/* Check if there are pending "abnormal" interrupts */
21242121

21252122
if ((dmasr & ETH_DMAINT_AIS) != 0)
21262123
{
21272124
/* Just let the user know what happened */
21282125

2129-
nerr("ERROR: Abormal event(s): %08x\n", dmasr);
2126+
nerr("ERROR: Abnormal event(s): %08" PRIx32 "\n", dmasr);
21302127

21312128
/* Clear all pending abnormal events */
21322129

@@ -2135,8 +2132,23 @@ static void stm32_interrupt_work(void *arg)
21352132
/* Clear the pending abnormal summary interrupt */
21362133

21372134
stm32_putreg(ETH_DMAINT_AIS, STM32_ETH_DMASR);
2135+
2136+
/* As per the datasheet's recommendation, the MAC
2137+
* needs to be reset for all abnormal events. The
2138+
* scheduled job will take the interface down and
2139+
* up again.
2140+
*/
2141+
2142+
work_queue(ETHWORK, &priv->irqwork, stm32_txtimeout_work, priv, 0);
2143+
2144+
/* Interrupts need to remain disabled, no other
2145+
* processing will take place. After reset
2146+
* everything will be restored.
2147+
*/
2148+
2149+
net_unlock();
2150+
return;
21382151
}
2139-
#endif
21402152

21412153
net_unlock();
21422154

arch/arm/src/stm32h7/stm32_ethernet.c

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2230,16 +2230,13 @@ static void stm32_interrupt_work(void *arg)
22302230
stm32_putreg(ETH_DMACSR_NIS, STM32_ETH_DMACSR);
22312231
}
22322232

2233-
/* Handle error interrupt only if CONFIG_DEBUG_NET is eanbled */
2234-
2235-
#ifdef CONFIG_DEBUG_NET
22362233
/* Check if there are pending "abnormal" interrupts */
22372234

22382235
if ((dmasr & ETH_DMACSR_AIS) != 0)
22392236
{
22402237
/* Just let the user know what happened */
22412238

2242-
nerr("ERROR: Abormal event(s): %08x\n", dmasr);
2239+
nerr("ERROR: Abnormal event(s): %08" PRIx32 "\n", dmasr);
22432240

22442241
/* Clear all pending abnormal events */
22452242

@@ -2248,8 +2245,23 @@ static void stm32_interrupt_work(void *arg)
22482245
/* Clear the pending abnormal summary interrupt */
22492246

22502247
stm32_putreg(ETH_DMACSR_AIS, STM32_ETH_DMACSR);
2248+
2249+
/* As per the datasheet's recommendation, the MAC
2250+
* needs to be reset for all abnormal events. The
2251+
* scheduled job will take the interface down and
2252+
* up again.
2253+
*/
2254+
2255+
work_queue(ETHWORK, &priv->irqwork, stm32_txtimeout_work, priv, 0);
2256+
2257+
/* Interrupts need to remain disabled, no other
2258+
* processing will take place. After reset
2259+
* everything will be restored.
2260+
*/
2261+
2262+
net_unlock();
2263+
return;
22512264
}
2252-
#endif
22532265

22542266
net_unlock();
22552267

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