arch/risc-v: Add arch layer SHA accelerator support for esp32[-c3|-c6|-h2]

Add arch layer SHA accelerator support for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <[email protected]>

Author: eren-terzioglu

arch/risc-v/src/common/espressif/Kconfig

@@ -345,6 +345,12 @@ config ESPRESSIF_LEDC
 	select PWM
 	select ARCH_HAVE_PWM_MULTICHAN
 
+config ESPRESSIF_SHA_ACCELERATOR
+	bool "SHA Accelerator"
+	default n
+	---help---
+		Enable SHA accelerator support.
+
 config ESPRESSIF_ADC
 	bool "Analog-to-digital converter (ADC)"
 	default n

arch/risc-v/src/common/espressif/Make.defs

@@ -170,6 +170,14 @@ ifeq ($(CONFIG_ESPRESSIF_ADC),y)
 CHIP_CSRCS += esp_adc.c
 endif
 
+ifeq ($(CONFIG_ESPRESSIF_SHA_ACCELERATOR),y)
+	CHIP_CSRCS += esp_sha.c
+endif
+
+ifeq ($(CONFIG_CRYPTO_CRYPTODEV_HARDWARE),y)
+	CHIP_CSRCS += esp_crypto.c
+endif
+
 #############################################################################
 # Espressif HAL for 3rd Party Platforms
 #############################################################################