arch/arm/arm_mpu.c: fix build warning

armv7-m/arm_mpu.c: In function 'mpu_dump_region':
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 4 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 6 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 7 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%u' expects argument of type 'unsigned int', but argument 8 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"

Signed-off-by: fangxinyong <[email protected]>

Author: fxysunshine

arch/arm/src/armv7-m/arm_mpu.c

@@ -618,8 +618,8 @@ void mpu_dump_region(void)
       putreg32(i, MPU_RNR);
       rasr = getreg32(MPU_RASR);
       rbar = getreg32(MPU_RBAR);
-      _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
-            "AP=%X XN=%u\n", i, rbar & MPU_RBAR_ADDR_MASK,
+      _info("MPU-%d, alignedbase=%08"PRIx32" l2size=%"PRIu32" SRD=%"PRIx32""
+            "AP=%"PRIx32" XN=%"PRIu32"\n", i, rbar & MPU_RBAR_ADDR_MASK,
             rasr & MPU_RASR_SIZE_MASK, rasr & MPU_RASR_SRD_MASK,
             rasr & MPU_RASR_AP_MASK, rasr & MPU_RASR_XN);
       if (rasr & MPU_RASR_ENABLE)

arch/arm/src/armv8-m/arm_mpu.c

@@ -350,10 +350,10 @@ void mpu_dump_region(void)
       putreg32(i, MPU_RNR);
       rlar = getreg32(MPU_RLAR);
       rbar = getreg32(MPU_RBAR);
-      _info("MPU-%d, 0x%08X-0x%08X SH=%X AP=%X XN=%u\n",
-            i, rbar & MPU_RBAR_BASE_MASK, rlar & MPU_RLAR_LIMIT_MASK,
-            rbar & MPU_RBAR_SH_MASK, rbar & MPU_RBAR_AP_MASK,
-            rbar & MPU_RBAR_XN);
+      _info("MPU-%d, 0x%08"PRIx32"-0x%08"PRIx32" SH=%"PRIx32" AP=%"PRIx32""
+            "XN=%"PRIu32"\n", i, rbar & MPU_RBAR_BASE_MASK,
+            rlar & MPU_RLAR_LIMIT_MASK, rbar & MPU_RBAR_SH_MASK,
+            rbar & MPU_RBAR_AP_MASK, rbar & MPU_RBAR_XN);
       if (rlar & MPU_RLAR_ENABLE)
         {
           count++;