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AndreHeinemans-NXPxiaoxiang781216
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arch/arm: add support for imx95 m7 core
- Add support for i.MX95 M7 core - Interprocessor communication by RPMSG and SCMI - Drivers available for UART, SPI, I2C, CAN, IO and timers
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‎arch/arm/Kconfig

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@@ -183,6 +183,20 @@ config ARCH_CHIP_IMX6
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---help---
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Freescale iMX.6 architectures (Cortex-A9)
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config ARCH_CHIP_IMX9_CORTEX_M
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bool "NXP iMX.9 Cortex-M7"
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select ARCH_CORTEXM7
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select ARCH_HAVE_MPU
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select ARCH_HAVE_FETCHADD
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select ARCH_HAVE_RAMFUNCS
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_SPI_CS_CONTROL
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select ARM_HAVE_MPU_UNIFIED
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select ARMV7M_HAVE_STACKCHECK
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---help---
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iMX.9 architectures (Cortex-M7)
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config ARCH_CHIP_IMXRT
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bool "NXP/Freescale iMX.RT"
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select ARCH_CORTEXM7
@@ -1124,6 +1138,7 @@ config ARCH_CHIP
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default "gd32f4" if ARCH_CHIP_GD32F4
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default "imx1" if ARCH_CHIP_IMX1
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default "imx6" if ARCH_CHIP_IMX6
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default "imx9" if ARCH_CHIP_IMX9_CORTEX_M
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default "imxrt" if ARCH_CHIP_IMXRT
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default "kinetis" if ARCH_CHIP_KINETIS
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default "kl" if ARCH_CHIP_KL
@@ -1536,6 +1551,9 @@ endif
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if ARCH_CHIP_IMX6
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source "arch/arm/src/imx6/Kconfig"
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endif
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if ARCH_CHIP_IMX9_CORTEX_M
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source "arch/arm/src/imx9/Kconfig"
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endif
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if ARCH_CHIP_IMXRT
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source "arch/arm/src/imxrt/Kconfig"
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endif

‎arch/arm/include/imx9/chip.h

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/****************************************************************************
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* arch/arm/include/imx9/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-FileCopyrightText: 2024 NXP
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_IMX9_CHIP_H
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#define __ARCH_ARM_INCLUDE_IMX9_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* NVIC priority levels *****************************************************/
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/* Each priority field holds an 8-bit priority value, 0-15. The lower the
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* value, the greater the priority of the corresponding interrupt. The i.MX
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* RT processor implements only bits[7:4] of each field, bits[3:0] read as
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* zero and ignore writes.
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*/
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#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is min pri */
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#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Two bits of interrupt pri used */
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#define IMX9_GPIO_NPORTS 4
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#endif /* __ARCH_ARM_INCLUDE_IMX9_CHIP_H */

‎arch/arm/include/imx9/imx95_irq.h

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‎arch/arm/include/imx9/irq.h

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/****************************************************************************
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* arch/arm/include/imx9/irq.h
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-FileCopyrightText: 2024 NXP
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_IMX9_IRQ_H
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#define __ARCH_ARM_INCLUDE_IMX9_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#if defined(CONFIG_ARCH_CHIP_IMX95_M7)
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# include <arch/imx9/imx95_irq.h>
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#else
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# error "Unrecognized i.MX9 architecture"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map
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* directly to bits in the NVIC. This does, however, waste several words
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* of memory in the IRQ to handle mapping tables.
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*/
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/* Common Processor Exceptions (vectors 0-15) */
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#define IMX9_IRQ_RESERVED (0) /* Reserved vector .. only used with
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* CONFIG_DEBUG_FEATURES */
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/* Vector 0: Reset stack pointer value */
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/* Vector 1: Reset(not handled by IRQ) */
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#define IMX9_IRQ_NMI (2) /* Vector 2: Non-Maskable Int (NMI) */
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#define IMX9_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define IMX9_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
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#define IMX9_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define IMX9_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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/* Vectors 7-10: Reserved */
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#define IMX9_IRQ_SVCALL (11) /* Vector 11: SVC call */
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#define IMX9_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
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/* Vector 13: Reserved */
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#define IMX9_IRQ_PENDSV (14) /* Vector 14: Pendable SSR */
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#define IMX9_IRQ_SYSTICK (15) /* Vector 15: System tick */
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/* Chip-Specific External interrupts */
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#define IMX9_IRQ_EXTINT (16) /* Vector number of the first ext int */
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#define ARMV7M_PERIPHERAL_INTERRUPTS IMX9_IRQ_NEXTINT
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#endif /* __ARCH_ARM_INCLUDE_IMX9_IRQ_H */

‎arch/arm/src/imx9/CMakeLists.txt

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# ##############################################################################
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# arch/arm/src/imx9/CMakeLists.txt
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more contributor
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# license agreements. See the NOTICE file distributed with this work for
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# additional information regarding copyright ownership. The ASF licenses this
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# file to you under the Apache License, Version 2.0 (the "License"); you may not
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# use this file except in compliance with the License. You may obtain a copy of
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# the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations under
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# the License.
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#
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# ##############################################################################
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set(SRCS
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imx9_allocateheap.c
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imx9_start.c
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imx9_clockconfig.c
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imx9_gpio.c
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imx9_iomuxc.c
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imx9_irq.c
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imx9_timerisr.c
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imx9_idle.c)
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if(CONFIG_IMX9_SCMI)
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list(APPEND SRCS imx9_scmi.c)
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# NXP SDK SCMI interface for pinctrl and clocking
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endif()
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if(CONFIG_RPTUN)
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list(APPEND SRCS imx9_rsctable.c imx9_rptun.c)
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endif()
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if(CONFIG_IMX9_MU)
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list(APPEND SRCS imx9_mu.c)
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endif()
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if(CONFIG_ARM_MPU)
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list(APPEND SRCS imx9_mpuinit.c)
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endif()
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if(CONFIG_IMX9_FLEXCAN)
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list(APPEND SRCS imx9_flexcan.c)
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endif()
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if(CONFIG_IMX9_LPUART)
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list(APPEND SRCS imx9_lpuart.c imx9_lowputc.c)
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endif()
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if(CONFIG_IMX9_GPIO_IRQ)
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list(APPEND SRCS imx9_gpioirq.c)
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endif()
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if(CONFIG_IMX9_FLEXIO_PWM)
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list(APPEND SRCS imx9_flexio_pwm.c)
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endif()
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if(CONFIG_IMX9_TPM_PWM)
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list(APPEND SRCS imx9_tpm_pwm.c)
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endif()
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if(CONFIG_IMX9_USBDEV)
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list(APPEND SRCS imx9_usbdev.c)
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endif()
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if(CONFIG_IMX9_LPI2C)
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list(APPEND SRCS imx9_lpi2c.c)
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endif()
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if(CONFIG_IMX9_LPSPI)
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list(APPEND SRCS imx9_lpspi.c)
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endif()
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if(CONFIG_IMX9_EDMA)
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list(APPEND SRCS imx9_edma.c)
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endif()
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target_sources(arch PRIVATE ${SRCS})

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