espressif: Update HAL library reference to include debug assert

During the board bringup, the new HAL reference includes an assert
to check if the critical section flags is being stored as expected.

Author: tmedicci

arch/risc-v/src/common/espressif/Make.defs

@@ -130,7 +130,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = 4da68b02f8d65613d80eadc269034acb84aca756
+	ESP_HAL_3RDPARTY_VERSION = 51770f0c97201401b535d833a30c5c0cb7df4edd
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL

arch/xtensa/src/esp32/Make.defs

@@ -208,7 +208,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = 4da68b02f8d65613d80eadc269034acb84aca756
+	ESP_HAL_3RDPARTY_VERSION = 51770f0c97201401b535d833a30c5c0cb7df4edd
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL

arch/xtensa/src/esp32s2/Make.defs

@@ -151,7 +151,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = 4da68b02f8d65613d80eadc269034acb84aca756
+	ESP_HAL_3RDPARTY_VERSION = 51770f0c97201401b535d833a30c5c0cb7df4edd
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL

arch/xtensa/src/esp32s3/Make.defs

@@ -209,7 +209,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = 4da68b02f8d65613d80eadc269034acb84aca756
+	ESP_HAL_3RDPARTY_VERSION = 51770f0c97201401b535d833a30c5c0cb7df4edd
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL

boards/risc-v/esp32c3/common/scripts/esp32c3_legacy_sections.ld

@@ -48,6 +48,7 @@ SECTIONS
     *libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*)
     *libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*)
     *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*)
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
   } >iram0_0_seg
 
   /* This section is required to skip .iram0.text area because iram0_0_seg

boards/risc-v/esp32c3/common/scripts/esp32c3_sections.ld

@@ -128,6 +128,8 @@ SECTIONS
     *libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
     *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
 
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
+
     esp_head.*(.literal .text .literal.* .text.*)
     esp_start.*(.literal .text .literal.* .text.*)
 

boards/risc-v/esp32c6/common/scripts/esp32c6_legacy_sections.ld

@@ -48,6 +48,7 @@ SECTIONS
     *libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*)
     *libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*)
     *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*)
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
   } >iram0_0_seg
 
   /* Marks the end of IRAM code segment */

boards/risc-v/esp32c6/common/scripts/esp32c6_sections.ld

@@ -135,6 +135,8 @@ SECTIONS
     *libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
     *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
 
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
+
     esp_head.*(.literal .text .literal.* .text.*)
     esp_start.*(.literal .text .literal.* .text.*)
 

boards/risc-v/esp32h2/common/scripts/esp32h2_legacy_sections.ld

@@ -48,6 +48,7 @@ SECTIONS
     *libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*)
     *libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*)
     *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*)
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
   } >iram0_0_seg
 
   /* Marks the end of IRAM code segment */

boards/risc-v/esp32h2/common/scripts/esp32h2_sections.ld

@@ -137,6 +137,8 @@ SECTIONS
     *libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
     *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
 
+    *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
+
     esp_head.*(.literal .text .literal.* .text.*)
     esp_start.*(.literal .text .literal.* .text.*)