risc-v/esp32c6: Add ESP32-C6 basic support

  1. Bring up OS kernel.
  2. Add interrupt support.
  3. Add system timer support.
  4. Add the ESP32-C6 devkit board.
  5. Add basic UART support for console.
  6. Add clock configuration.
  7. Add board reset support.

Author: cwespressif

Documentation/platforms/risc-v/esp32c6/index.rst

@@ -0,0 +1,68 @@
+==================
+Espressif ESP32-C6
+==================
+
+The ESP32-C6 is an ultra-low-power and highly integrated SoC with a RISC-V
+core and supports 2.4 GHz Wi-Fi 6, Bluetooth 5 (LE) and the 802.15.4 protocol.
+
+* Address Space
+  - 800 KB of internal memory address space accessed from the instruction bus
+  - 560 KB of internal memory address space accessed from the data bus
+  - 1016 KB of peripheral address space
+  - 8 MB of external memory virtual address space accessed from the instruction bus
+  - 8 MB of external memory virtual address space accessed from the data bus
+  - 480 KB of internal DMA address space
+* Internal Memory
+  - 320 KB ROM
+  - 512 KB SRAM (16 KB can be configured as Cache)
+  - 16 KB of SRAM in RTC
+* External Memory
+  - Up to 16 MB of external flash
+* Peripherals
+  - 35 peripherals
+* GDMA
+  - 7 modules are capable of DMA operations.
+
+ESP32-C6 Toolchain
+==================
+
+A generic RISC-V toolchain can be used to build ESP32-C6 projects.
+SiFive's toolchain can be downloaded from: https://github.com/sifive/freedom-tools/releases
+
+Second stage bootloader and partition table
+===========================================
+
+The NuttX port for now relies on IDF's second stage bootloader to carry on some hardware
+initializations.  The binaries for the bootloader and the partition table can be found in
+this repository: https://github.com/espressif/esp-nuttx-bootloader
+That repository contains a dummy IDF project that's used to build the bootloader and
+partition table, these are then presented as Github assets and can be downloaded
+from: https://github.com/espressif/esp-nuttx-bootloader/releases
+Download ``bootloader-esp32c6.bin`` and ``partition-table-esp32c6.bin`` and place them
+in a folder, the path to this folder will be used later to program them. This
+can be: ``../esp-bins``
+
+Building and flashing
+=====================
+
+First make sure that ``esptool.py`` is installed.  This tool is used to convert
+the ELF to a compatible ESP32-C6 image and to flash the image into the board.
+It can be installed with: ``pip install esptool``.
+
+Configure the NUttX project: ``./tools/configure.sh esp32c6-devkit:nsh``
+Run ``make`` to build the project.  Note that the conversion mentioned above is
+included in the build process.  
+The `esptool.py` command to flash all the binaries is::
+
+     esptool.py --chip esp32c6 --port /dev/ttyUSBXX --baud 921600 write_flash 0x0 bootloader.bin 0x8000 partition-table.bin 0x10000 nuttx.bin
+
+However, this is also included in the build process and we can build and flash with::
+
+   make flash ESPTOOL_PORT=<port> ESPTOOL_BINDIR=../esp-bins
+
+Where ``<port>`` is typically ``/dev/ttyUSB0`` or similar and ``../esp-bins`` is 
+the path to the folder containing the bootloader and the partition table
+for the ESP32-C6 as explained above.
+Note that this step is required only one time.  Once the bootloader and partition
+table are flashed, we don't need to flash them again.  So subsequent builds
+would just require: ``make flash ESPTOOL_PORT=/dev/ttyUSBXX``

arch/risc-v/Kconfig

@@ -87,6 +87,29 @@ config ARCH_CHIP_ESP32C3
 	---help---
 		Espressif ESP32-C3 (RV32IMC).
 
+config ARCH_CHIP_ESP32C6
+	bool "Espressif ESP32-C6"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	select ARCH_VECNOTIRQ
+	select ARCH_HAVE_RESET
+	select LIBC_ARCH_MEMCPY
+	select LIBC_ARCH_MEMCHR
+	select LIBC_ARCH_MEMCMP
+	select LIBC_ARCH_MEMMOVE
+	select LIBC_ARCH_MEMSET
+	select LIBC_ARCH_STRCHR
+	select LIBC_ARCH_STRCMP
+	select LIBC_ARCH_STRCPY
+	select LIBC_ARCH_STRLCPY
+	select LIBC_ARCH_STRNCPY
+	select LIBC_ARCH_STRLEN
+	select LIBC_ARCH_STRNLEN
+	---help---
+		Espressif ESP32-C6 (RV32IMAC).
+
 config ARCH_CHIP_C906
 	bool "THEAD C906"
 	select ARCH_RV64
@@ -199,6 +222,7 @@ config ARCH_CHIP
 	default "litex"		if ARCH_CHIP_LITEX
 	default "bl602"		if ARCH_CHIP_BL602
 	default "esp32c3"	if ARCH_CHIP_ESP32C3
+	default "esp32c6"	if ARCH_CHIP_ESP32C6
 	default "c906"		if ARCH_CHIP_C906
 	default "mpfs"		if ARCH_CHIP_MPFS
 	default "rv32m1"	if ARCH_CHIP_RV32M1
@@ -329,6 +353,9 @@ endif
 if ARCH_CHIP_ESP32C3
 source "arch/risc-v/src/esp32c3/Kconfig"
 endif
+if ARCH_CHIP_ESP32C6
+source "arch/risc-v/src/esp32c6/Kconfig"
+endif
 if ARCH_CHIP_C906
 source "arch/risc-v/src/c906/Kconfig"
 endif

arch/risc-v/include/esp32c6/chip.h

@@ -0,0 +1,24 @@
+/****************************************************************************
+ * arch/risc-v/include/esp32c6/chip.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H
+#define __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H
+
+#endif /* __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H */