@@ -21,13 +21,11 @@ using namespace clang;
2121using namespace clang ::CIRGen;
2222
2323template <typename ... Operands>
24- static mlir::Value emitIntrinsicCallOp (CIRGenFunction &cgf, const CallExpr *e ,
25- const std::string & str,
24+ static mlir::Value emitIntrinsicCallOp (CIRGenBuilderTy &builder ,
25+ mlir::Location loc, const StringRef str,
2626 const mlir::Type &resTy,
2727 Operands &&...op) {
28- CIRGenBuilderTy &builder = cgf.getBuilder ();
29- mlir::Location location = cgf.getLoc (e->getExprLoc ());
30- return cir::LLVMIntrinsicCallOp::create (builder, location,
28+ return cir::LLVMIntrinsicCallOp::create (builder, loc,
3129 builder.getStringAttr (str), resTy,
3230 std::forward<Operands>(op)...)
3331 .getResult ();
@@ -68,10 +66,8 @@ static mlir::Value emitVectorFCmp(CIRGenBuilderTy &builder,
6866 return bitCast;
6967}
7068
71- static mlir::Value getMaskVecValue (CIRGenFunction &cgf, const CallExpr *expr ,
69+ static mlir::Value getMaskVecValue (CIRGenBuilderTy &builder, mlir::Location loc ,
7270 mlir::Value mask, unsigned numElems) {
73-
74- CIRGenBuilderTy &builder = cgf.getBuilder ();
7571 auto maskTy = cir::VectorType::get (
7672 builder.getUIntNTy (1 ), cast<cir::IntType>(mask.getType ()).getWidth ());
7773 mlir::Value maskVec = builder.createBitcast (mask, maskTy);
@@ -84,8 +80,7 @@ static mlir::Value getMaskVecValue(CIRGenFunction &cgf, const CallExpr *expr,
8480 for (auto i : llvm::seq<unsigned >(0 , numElems))
8581 indices.push_back (cir::IntAttr::get (i32Ty, i));
8682
87- maskVec = builder.createVecShuffle (cgf.getLoc (expr->getExprLoc ()), maskVec,
88- maskVec, indices);
83+ maskVec = builder.createVecShuffle (loc, maskVec, maskVec, indices);
8984 }
9085 return maskVec;
9186}
@@ -163,15 +158,20 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
163158 default :
164159 return {};
165160 case X86::BI_mm_clflush:
166- return emitIntrinsicCallOp (*this , expr, " x86.sse2.clflush" , voidTy, ops[0 ]);
161+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
162+ " x86.sse2.clflush" , voidTy, ops[0 ]);
167163 case X86::BI_mm_lfence:
168- return emitIntrinsicCallOp (*this , expr, " x86.sse2.lfence" , voidTy);
164+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
165+ " x86.sse2.lfence" , voidTy);
169166 case X86::BI_mm_pause:
170- return emitIntrinsicCallOp (*this , expr, " x86.sse2.pause" , voidTy);
167+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
168+ " x86.sse2.pause" , voidTy);
171169 case X86::BI_mm_mfence:
172- return emitIntrinsicCallOp (*this , expr, " x86.sse2.mfence" , voidTy);
170+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
171+ " x86.sse2.mfence" , voidTy);
173172 case X86::BI_mm_sfence:
174- return emitIntrinsicCallOp (*this , expr, " x86.sse.sfence" , voidTy);
173+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
174+ " x86.sse.sfence" , voidTy);
175175 case X86::BI_mm_prefetch:
176176 case X86::BI__rdtsc:
177177 case X86::BI__builtin_ia32_rdtscp: {
@@ -183,15 +183,17 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
183183 case X86::BI__builtin_ia32_lzcnt_u16:
184184 case X86::BI__builtin_ia32_lzcnt_u32:
185185 case X86::BI__builtin_ia32_lzcnt_u64: {
186- mlir::Value isZeroPoison = builder.getFalse (getLoc (expr->getExprLoc ()));
187- return emitIntrinsicCallOp (*this , expr, " ctlz" , ops[0 ].getType (),
186+ mlir::Location loc = getLoc (expr->getExprLoc ());
187+ mlir::Value isZeroPoison = builder.getFalse (loc);
188+ return emitIntrinsicCallOp (builder, loc, " ctlz" , ops[0 ].getType (),
188189 mlir::ValueRange{ops[0 ], isZeroPoison});
189190 }
190191 case X86::BI__builtin_ia32_tzcnt_u16:
191192 case X86::BI__builtin_ia32_tzcnt_u32:
192193 case X86::BI__builtin_ia32_tzcnt_u64: {
193- mlir::Value isZeroPoison = builder.getFalse (getLoc (expr->getExprLoc ()));
194- return emitIntrinsicCallOp (*this , expr, " cttz" , ops[0 ].getType (),
194+ mlir::Location loc = getLoc (expr->getExprLoc ());
195+ mlir::Value isZeroPoison = builder.getFalse (loc);
196+ return emitIntrinsicCallOp (builder, loc, " cttz" , ops[0 ].getType (),
195197 mlir::ValueRange{ops[0 ], isZeroPoison});
196198 }
197199 case X86::BI__builtin_ia32_undef128:
@@ -247,14 +249,14 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
247249 mlir::Location loc = getLoc (expr->getExprLoc ());
248250 Address tmp = createMemTemp (expr->getArg (0 )->getType (), loc);
249251 builder.createStore (loc, ops[0 ], tmp);
250- return emitIntrinsicCallOp (* this , expr , " x86.sse.ldmxcsr" ,
252+ return emitIntrinsicCallOp (builder, loc , " x86.sse.ldmxcsr" ,
251253 builder.getVoidTy (), tmp.getPointer ());
252254 }
253255 case X86::BI_mm_getcsr:
254256 case X86::BI__builtin_ia32_stmxcsr: {
255257 mlir::Location loc = getLoc (expr->getExprLoc ());
256258 Address tmp = createMemTemp (expr->getType (), loc);
257- emitIntrinsicCallOp (* this , expr , " x86.sse.stmxcsr" , builder.getVoidTy (),
259+ emitIntrinsicCallOp (builder, loc , " x86.sse.stmxcsr" , builder.getVoidTy (),
258260 tmp.getPointer ());
259261 return builder.createLoad (loc, tmp);
260262 }
@@ -636,50 +638,48 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
636638 case X86::BI__builtin_ia32_kshiftlihi:
637639 case X86::BI__builtin_ia32_kshiftlisi:
638640 case X86::BI__builtin_ia32_kshiftlidi: {
641+ mlir::Location loc = getLoc (expr->getExprLoc ());
639642 unsigned shiftVal =
640643 ops[1 ].getDefiningOp <cir::ConstantOp>().getIntValue ().getZExtValue () &
641644 0xff ;
642645 unsigned numElems = cast<cir::IntType>(ops[0 ].getType ()).getWidth ();
643646
644647 if (shiftVal >= numElems)
645- return builder.getNullValue (ops[0 ].getType (), getLoc (expr-> getExprLoc ()) );
648+ return builder.getNullValue (ops[0 ].getType (), loc );
646649
647- mlir::Value in = getMaskVecValue (* this , expr , ops[0 ], numElems);
650+ mlir::Value in = getMaskVecValue (builder, loc , ops[0 ], numElems);
648651
649652 SmallVector<mlir::Attribute, 64 > indices;
650653 mlir::Type i32Ty = builder.getSInt32Ty ();
651654 for (auto i : llvm::seq<unsigned >(0 , numElems))
652655 indices.push_back (cir::IntAttr::get (i32Ty, numElems + i - shiftVal));
653656
654- mlir::Value zero =
655- builder.getNullValue (in.getType (), getLoc (expr->getExprLoc ()));
656- mlir::Value sv =
657- builder.createVecShuffle (getLoc (expr->getExprLoc ()), zero, in, indices);
657+ mlir::Value zero = builder.getNullValue (in.getType (), loc);
658+ mlir::Value sv = builder.createVecShuffle (loc, zero, in, indices);
658659 return builder.createBitcast (sv, ops[0 ].getType ());
659660 }
660661 case X86::BI__builtin_ia32_kshiftriqi:
661662 case X86::BI__builtin_ia32_kshiftrihi:
662663 case X86::BI__builtin_ia32_kshiftrisi:
663664 case X86::BI__builtin_ia32_kshiftridi: {
665+ mlir::Location loc = getLoc (expr->getExprLoc ());
664666 unsigned shiftVal =
665667 ops[1 ].getDefiningOp <cir::ConstantOp>().getIntValue ().getZExtValue () &
666668 0xff ;
667669 unsigned numElems = cast<cir::IntType>(ops[0 ].getType ()).getWidth ();
668670
669671 if (shiftVal >= numElems)
670- return builder.getNullValue (ops[0 ].getType (), getLoc (expr-> getExprLoc ()) );
672+ return builder.getNullValue (ops[0 ].getType (), loc );
671673
672- mlir::Value in = getMaskVecValue (* this , expr , ops[0 ], numElems);
674+ mlir::Value in = getMaskVecValue (builder, loc , ops[0 ], numElems);
673675
674676 SmallVector<mlir::Attribute, 64 > indices;
675677 mlir::Type i32Ty = builder.getSInt32Ty ();
676678 for (auto i : llvm::seq<unsigned >(0 , numElems))
677679 indices.push_back (cir::IntAttr::get (i32Ty, i + shiftVal));
678680
679- mlir::Value zero =
680- builder.getNullValue (in.getType (), getLoc (expr->getExprLoc ()));
681- mlir::Value sv =
682- builder.createVecShuffle (getLoc (expr->getExprLoc ()), in, zero, indices);
681+ mlir::Value zero = builder.getNullValue (in.getType (), loc);
682+ mlir::Value sv = builder.createVecShuffle (loc, in, zero, indices);
683683 return builder.createBitcast (sv, ops[0 ].getType ());
684684 }
685685 case X86::BI__builtin_ia32_vprotbi:
0 commit comments