Properly keep the SYSCFG module disabled unless access is needed

Author: GrumpyOldPizza

system/libstm32l4_dragonfly/stm32l4_dma.c

@@ -80,28 +80,6 @@ typedef struct _stm32l4_dma_driver_t {
 
 static stm32l4_dma_driver_t stm32l4_dma_driver;
 
-static void stm32l4_dma_flash_sleep(void)
-{
-    uint32_t o_flash, n_flash;
-
-    o_flash = stm32l4_dma_driver.flash;
-	
-    do
-    {
-	n_flash = o_flash - 1;
-	
-	if (n_flash == 0)
-	{
-	    armv7m_atomic_and(&RCC->AHB1SMENR, ~RCC_AHB1SMENR_FLASHSMEN);
-	}
-	else
-	{
-	    armv7m_atomic_or(&RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN);
-	}
-    }
-    while (!armv7m_atomic_compare_exchange(&stm32l4_dma_driver.flash, &o_flash, n_flash));
-}
-
 static void stm32l4_dma_track(uint32_t address)
 {
     if (address < 0x10000000)

system/libstm32l4_dragonfly/stm32l4_exti.c

@@ -155,6 +155,7 @@ bool stm32l4_exti_resume(stm32l4_exti_t *exti, uint32_t mask)
 bool stm32l4_exti_notify(stm32l4_exti_t *exti, uint16_t pin, uint32_t control, stm32l4_exti_callback_t callback, void *context)
 {
     unsigned int mask, index, group;
+    uint32_t apb2enr;
 
     if (exti->state != EXTI_STATE_READY)
     {
@@ -192,7 +193,19 @@ bool stm32l4_exti_notify(stm32l4_exti_t *exti, uint16_t pin, uint32_t control, s
 	    armv7m_atomic_and(&EXTI->FTSR1, ~mask);
 	}
 
+	apb2enr = RCC->APB2ENR;
+
+	if (!(apb2enr & RCC_APB2ENR_SYSCFGEN))
+	{
+	    armv7m_atomic_or(&RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);
+	}
+	
 	armv7m_atomic_modify(&SYSCFG->EXTICR[index >> 2], (0x0000000f << ((index & 3) << 2)), (group << ((index & 3) << 2)));
+
+	if (!(apb2enr & RCC_APB2ENR_SYSCFGEN))
+	{
+	    armv7m_atomic_and(&RCC->APB2ENR, ~RCC_APB2ENR_SYSCFGEN);
+	}
 
 	armv7m_atomic_or(&exti->enables, mask);
 

system/libstm32l4_dragonfly/stm32l4_i2c.c

@@ -860,7 +860,7 @@ bool stm32l4_i2c_disable(stm32l4_i2c_t *i2c)
 bool stm32l4_i2c_configure(stm32l4_i2c_t *i2c, uint32_t clock, uint32_t option)
 {
     I2C_TypeDef *I2C = i2c->I2C;
-    uint32_t pin_scl, pin_sda, i2c_cr1, i2c_cr2, i2c_oar1, i2c_oar2, i2c_timingr, syscfg_cfgr1, count;
+    uint32_t pin_scl, pin_sda, i2c_cr1, i2c_cr2, i2c_oar1, i2c_oar2, i2c_timingr, syscfg_cfgr1, apb2enr, count;
 
     if ((i2c->state != I2C_STATE_READY) && (i2c->state != I2C_STATE_BUSY))
     {
@@ -966,6 +966,13 @@ bool stm32l4_i2c_configure(stm32l4_i2c_t *i2c, uint32_t clock, uint32_t option)
 	syscfg_cfgr1 = SYSCFG_CFGR1_I2C3_FMP;
 	break;
     }
+
+    apb2enr = RCC->APB2ENR;
+
+    if (!(apb2enr & RCC_APB2ENR_SYSCFGEN))
+    {
+	armv7m_atomic_or(&RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);
+    }
 
     if (i2c->clock == 1000000)
     {
@@ -976,6 +983,11 @@ bool stm32l4_i2c_configure(stm32l4_i2c_t *i2c, uint32_t clock, uint32_t option)
 	armv7m_atomic_and(&SYSCFG->CFGR1, ~syscfg_cfgr1);
     }
 
+    if (!(apb2enr & RCC_APB2ENR_SYSCFGEN))
+    {
+	armv7m_atomic_and(&RCC->APB2ENR, ~RCC_APB2ENR_SYSCFGEN);
+    }
+
     I2C->TIMINGR = i2c_timingr;
     I2C->OAR2 = i2c_oar2;
     I2C->OAR1 = i2c_oar1;

system/libstm32l4_dragonfly/stm32l4_system.c

@@ -425,22 +425,16 @@ bool stm32l4_system_configure(uint32_t sysclk, uint32_t hclk, uint32_t pclk1, ui
 	return false;
     }
 
-    /* Unlock SYSCFG (and leave it unlocked for EXTI use.
-     */
-
-    RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
-
     /* Detect LSE/HSE on the first pass.
      */
 
     if (stm32l4_system_device.lseclk == 0)
     {
-	apb1enr1 = RCC->APB1ENR1;
+	/* This is executed only on the very forst goaround, while interrupts are disabled.
+	 * So RCC does not need atomics.
+	 */
 
-	if (!(apb1enr1 & RCC_APB1ENR1_PWREN))
-	{
-	    armv7m_atomic_or(&RCC->APB1ENR1, RCC_APB1ENR1_PWREN);
-	}
+	RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
 
 	PWR->CR1 |= PWR_CR1_DBP;
 
@@ -454,13 +448,12 @@ bool stm32l4_system_configure(uint32_t sysclk, uint32_t hclk, uint32_t pclk1, ui
 
 	    /* Switch to System Memory @ 0x00000000.
 	     */
+
+	    RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
 	    SYSCFG->MEMRMP = (SYSCFG->MEMRMP & ~SYSCFG_MEMRMP_MEM_MODE) | SYSCFG_MEMRMP_MEM_MODE_0;
 	    RCC->APB2ENR &= ~RCC_APB2ENR_SYSCFGEN;
 
-	    if (!(apb1enr1 & RCC_APB1ENR1_PWREN))
-	    {
-		armv7m_atomic_and(&RCC->APB1ENR1, ~RCC_APB1ENR1_PWREN);
-	    }
+	    RCC->APB1ENR1 &= ~RCC_APB1ENR1_PWREN;
 
 	    SCB->VTOR = 0;
 
@@ -514,10 +507,7 @@ bool stm32l4_system_configure(uint32_t sysclk, uint32_t hclk, uint32_t pclk1, ui
 	 */
 	PWR->CR4 |= PWR_CR4_VBE;
 
-	if (!(apb1enr1 & RCC_APB1ENR1_PWREN))
-	{
-	    armv7m_atomic_and(&RCC->APB1ENR1, ~RCC_APB1ENR1_PWREN);
-	}
+	RCC->APB1ENR1 &= ~RCC_APB1ENR1_PWREN;
     }
 
     if (stm32l4_system_device.hseclk == 0)