@@ -24,7 +24,7 @@ disconnect!
2424```
2525
2626For example, a cascade of 20 RC-lowpasses could be generated by:
27- ``` julia
27+ ``` jldoctest ug; output = false, setup = :(using ACME)
2828circ = @circuit begin
2929 src = voltagesource(), [-] ⟷ gnd
3030 output = voltageprobe(), [-] ⟷ gnd
@@ -36,9 +36,12 @@ for i in 1:20
3636 connect!(circ, (resrefdes, 1), pin)
3737 connect!(circ, (resrefdes, 2), (caprefdes, 1))
3838 connect!(circ, (caprefdes, 2), :gnd)
39- pin = (resrefdes, 2 )
39+ global pin = (resrefdes, 2)
4040end
4141connect!(circ, pin, (:output, +))
42+
43+ # output
44+
4245```
4346
4447## Model Creation and Use
@@ -47,35 +50,63 @@ A `Circuit` only stores elements and information about their connections. To
4750simulate a circuit, a model has to be derived from it. This can be as simple
4851as:
4952
50- ``` Julia
53+ ``` jldoctest ug; output = false, filter = r"(ACME \. )?DiscreteModel{.*"s
5154model = DiscreteModel(circ, 1/44100)
55+
56+ # output
57+
58+ DiscreteModel{...}(...)
5259```
5360
5461Here, ` 1/44100 ` denotes the sampling interval, i.e. the reciprocal of the
5562sampling rate at which the model should run. Optionally, one can specify the
5663solver to use for solving the model's non-linear equation:
5764
58- ``` Julia
65+ ``` jldoctest ug; output = false, filter = r"(ACME \. )?DiscreteModel{.*"s
5966model = DiscreteModel(circ, 1/44100, HomotopySolver{SimpleSolver})
67+
68+ # output
69+
70+ DiscreteModel{...}(...)
6071```
6172
6273See [ Solvers] ( @ref ) for more information about the available solvers.
6374
6475Once a model is created, it can be run:
6576
66- ``` Julia
77+ ``` jldoctest; output = false, setup = :(using ACME; model=DiscreteModel(@circuit(begin end), 1); u=zeros(0,10))
6778y = run!(model, u)
79+
80+ # output
81+
82+ 0×10 Array{Float64,2}
6883```
6984
7085The input ` u ` is matrix with one row for each of the circuit's inputs and one
7186column for each time step to simulate. Likewise, the output ` y ` will be a
7287matrix with one row for each of the circuit's outputs and one column for each
7388simulated time step. The order of the rows will correspond to the order in which
74- the respective input and output elements were added to the ` Circuit ` . To
89+ the respective input and output elements were added to the ` Circuit ` .
90+ So for above circuit, we may obtain the first 100 samples of the impulse
91+ response with
92+
93+ ``` jldoctest ug
94+ run!(model, [1 zeros(1,99)])
95+
96+ # output
97+
98+ 1×100 Array{Float64,2}:
99+ 1.83357e-8 3.1622e-7 2.59861e-6 … 0.00465423 0.00459275 0.00453208
100+ ```
101+ To
75102simulate a circuit without inputs, a matrix with zero rows may be passed:
76103
77- ``` Julia
104+ ``` jldoctest; output = false, setup = :(using ACME; model=DiscreteModel(@circuit(begin end), 1))
78105y = run!(model, zeros(0, 100))
106+
107+ # output
108+
109+ 0×100 Array{Float64,2}
79110```
80111
81112The internal state of the model (e.g. capacitor charges) is preserved accross
@@ -85,9 +116,12 @@ Each invocation of `run!` in this way has to allocate some memory as temporary
85116storage. To avoid this overhead when running the same model for many small input
86117blocks, a ` ModelRunner ` instance can be created explicitly:
87118
88- ``` Julia
119+ ``` jldoctest ug; output = false, setup = :(u=zeros(1,10); y=zeros(1,10))
89120runner = ModelRunner(model, false)
90121run!(runner, y, u)
122+
123+ # output
124+
91125```
92126
93127By using a pre-allocated output ` y ` as in the example, allocations in ` run! ` are
@@ -97,8 +131,32 @@ Upon creation of a `DiscreteModel`, its internal states (e.g. capacitor charges)
97131are set to zero. It is also possible to set the states to a steady state (if
98132one can be found) with:
99133
100- ``` Julia
134+ ``` jldoctest ug; output = false
101135steadystate!(model)
136+
137+ # output
138+
139+ 20-element Array{Float64,1}:
140+ 0.0
141+ 0.0
142+ 0.0
143+ 0.0
144+ 0.0
145+ 0.0
146+ 0.0
147+ 0.0
148+ 0.0
149+ 0.0
150+ 0.0
151+ 0.0
152+ 0.0
153+ 0.0
154+ 0.0
155+ 0.0
156+ 0.0
157+ 0.0
158+ 0.0
159+ 0.0
102160```
103161
104162This is often desirable for circuits where bias voltages are only slowly
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