implement fmin & fmax instructions

Author: CedarMist

README.md

@@ -18,6 +18,9 @@
  * Bitwise compatible with Softfloat + passes all tests
  * Can simulate RISC-V extensions F & D
 
+For a quick benchmark vs other Rust softfloat libraries, see [softfloat_bench].
+
+[softfloat_bench]: https://github.com/HarryR/softfloat_bench/
 [RISC-V]: https://five-embeddev.com/riscv-user-isa-manual/Priv-v1.12/f.html
 [IEEE-754]: https://en.wikipedia.org/wiki/IEEE_754
 [C2Rust]: https://github.com/immunant/c2rust
@@ -54,7 +57,7 @@ You can directly access the underlying SoftFloat functions, like `f32_mulAdd` vi
 use softfloat_pure::softfloat::*;
 let a = float32_t::from_bits(0x...);
 let b = float32_t::from_bits(0x...);
-let x = f32_add(a,b, 0, 0);
+let x = f32_add(a, b, 0/*rounding_mode*/, 0/*detect_tininess*/);
 assert_eq!(x.0, 0x...); // result
 assert_eq!(x.1, 0);     // flags
 ```

src/fpu.rs

@@ -267,6 +267,60 @@ impl FPU {
     {
         self.flagged(a.borrow().sqrt(rnd, self.detect_tininess))
     }
+
+    #[inline]
+    #[must_use]
+    pub fn max<F, T>(&mut self, a: T, b: T) -> F
+    where
+        F: Float,
+        T: Borrow<F>,
+    {
+        let fs1_val = a.borrow();
+        let fs2_val = b.borrow();
+        let fs2_nan = fs2_val.is_nan();
+        let fs1_nan = fs1_val.is_nan();
+        if fs1_nan && fs2_nan {
+            F::from_bits(F::DEFAULT_NAN)
+        }
+        else {
+            let is_lt = self.lt_quiet::<F,&F>(fs2_val, fs1_val);
+            let is_eq = self.eq::<F,&F>(fs2_val, fs1_val);
+            let greater = is_lt || (is_eq && (fs1_val.is_positive() || !fs2_val.is_positive()));
+            if greater || fs2_nan {
+                F::from_bits(fs1_val.to_bits())
+            }
+            else {
+                F::from_bits(fs2_val.to_bits())
+            }
+        }
+    }
+
+    #[inline]
+    #[must_use]
+    pub fn min<F, T>(&mut self, a: T, b: T) -> F
+    where
+        F: Float,
+        T: Borrow<F>,
+    {
+        let fs1_val = a.borrow();
+        let fs2_val = b.borrow();
+        let fs2_nan = fs2_val.is_nan();
+        let fs1_nan = fs1_val.is_nan();
+        if fs1_nan && fs2_nan {
+            F::from_bits(F::DEFAULT_NAN)
+        }
+        else {
+            let is_lt = self.lt_quiet::<F,&F>(fs1_val, fs2_val);
+            let is_eq = self.eq::<F,&F>(fs1_val, fs2_val);
+            let less = is_lt || (is_eq && !fs1_val.is_positive());
+            if less || fs2_nan {
+                F::from_bits(fs1_val.to_bits())
+            }
+            else {
+                F::from_bits(fs2_val.to_bits())
+            }
+        }
+    }
 }
 
 impl FPU {
@@ -320,3 +374,176 @@ impl FPU {
         ui32_to_f64(a)
     }
 }
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    // Helper functions to create specific float values
+    fn make_f32(v: f32) -> float32_t {
+        float32_t::from_bits(v.to_bits())
+    }
+
+    fn make_f64(v: f64) -> float64_t {
+        float64_t::from_bits(v.to_bits())
+    }
+
+    fn get_f32(v: float32_t) -> f32 {
+        f32::from_bits(v.to_bits())
+    }
+
+    fn get_f64(v: float64_t) -> f64 {
+        f64::from_bits(v.to_bits())
+    }
+
+    #[test]
+    fn test_max_f32_normal_values() {
+        let mut fpu = FPU::default();
+
+        // Test regular positive values
+        assert_eq!(get_f32(fpu.max(make_f32(1.0), make_f32(2.0))), 2.0);
+        assert_eq!(get_f32(fpu.max(make_f32(2.0), make_f32(1.0))), 2.0);
+
+        // Test regular negative values
+        assert_eq!(get_f32(fpu.max(make_f32(-1.0), make_f32(-2.0))), -1.0);
+        assert_eq!(get_f32(fpu.max(make_f32(-2.0), make_f32(-1.0))), -1.0);
+
+        // Test mixed sign values
+        assert_eq!(get_f32(fpu.max(make_f32(-1.0), make_f32(1.0))), 1.0);
+        assert_eq!(get_f32(fpu.max(make_f32(1.0), make_f32(-1.0))), 1.0);
+    }
+
+    #[test]
+    fn test_max_f32_special_values() {
+        let mut fpu = FPU::default();
+
+        // Test with infinities
+        assert_eq!(get_f32(fpu.max(make_f32(f32::INFINITY), make_f32(1.0))), f32::INFINITY);
+        assert_eq!(get_f32(fpu.max(make_f32(1.0), make_f32(f32::INFINITY))), f32::INFINITY);
+        assert_eq!(get_f32(fpu.max(make_f32(f32::NEG_INFINITY), make_f32(1.0))), 1.0);
+        assert_eq!(get_f32(fpu.max(make_f32(1.0), make_f32(f32::NEG_INFINITY))), 1.0);
+        assert_eq!(get_f32(fpu.max(make_f32(f32::INFINITY), make_f32(f32::NEG_INFINITY))), f32::INFINITY);
+
+        // Test with NaN
+        let nan = f32::NAN;
+        let result1 = get_f32(fpu.max(make_f32(nan), make_f32(1.0)));
+        let result2 = get_f32(fpu.max(make_f32(1.0), make_f32(nan)));
+
+        assert_eq!(result1, 1.0); // NaN + non-NaN should return non-NaN
+        assert_eq!(result2, 1.0); // non-NaN + NaN should return non-NaN
+
+        // Both NaN should return a canonical NaN
+        let result_both_nan = fpu.max(make_f32(nan), make_f32(nan));
+        assert!(get_f32(result_both_nan).is_nan());
+
+        // Test with zero
+        let plus_zero = 0.0f32;
+        let minus_zero = -0.0f32;
+
+        // Max should prefer +0 over -0
+        let zero_result = get_f32(fpu.max(make_f32(plus_zero), make_f32(minus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_positive());
+
+        let zero_result = get_f32(fpu.max(make_f32(minus_zero), make_f32(plus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_positive());
+    }
+
+    #[test]
+    fn test_min_f32_normal_values() {
+        let mut fpu = FPU::default();
+
+        // Test regular positive values
+        assert_eq!(get_f32(fpu.min(make_f32(1.0), make_f32(2.0))), 1.0);
+        assert_eq!(get_f32(fpu.min(make_f32(2.0), make_f32(1.0))), 1.0);
+
+        // Test regular negative values
+        assert_eq!(get_f32(fpu.min(make_f32(-1.0), make_f32(-2.0))), -2.0);
+        assert_eq!(get_f32(fpu.min(make_f32(-2.0), make_f32(-1.0))), -2.0);
+
+        // Test mixed sign values
+        assert_eq!(get_f32(fpu.min(make_f32(-1.0), make_f32(1.0))), -1.0);
+        assert_eq!(get_f32(fpu.min(make_f32(1.0), make_f32(-1.0))), -1.0);
+    }
+
+    #[test]
+    fn test_min_f32_special_values() {
+        let mut fpu = FPU::default();
+
+        // Test with infinities
+        assert_eq!(get_f32(fpu.min(make_f32(f32::INFINITY), make_f32(1.0))), 1.0);
+        assert_eq!(get_f32(fpu.min(make_f32(1.0), make_f32(f32::INFINITY))), 1.0);
+        assert_eq!(get_f32(fpu.min(make_f32(f32::NEG_INFINITY), make_f32(1.0))), f32::NEG_INFINITY);
+        assert_eq!(get_f32(fpu.min(make_f32(1.0), make_f32(f32::NEG_INFINITY))), f32::NEG_INFINITY);
+        assert_eq!(get_f32(fpu.min(make_f32(f32::INFINITY), make_f32(f32::NEG_INFINITY))), f32::NEG_INFINITY);
+
+        // Test with NaN
+        let nan = f32::NAN;
+        let result1 = get_f32(fpu.min(make_f32(nan), make_f32(1.0)));
+        let result2 = get_f32(fpu.min(make_f32(1.0), make_f32(nan)));
+
+        assert_eq!(result1, 1.0); // NaN + non-NaN should return non-NaN
+        assert_eq!(result2, 1.0); // non-NaN + NaN should return non-NaN
+
+        // Both NaN should return a canonical NaN
+        let result_both_nan = fpu.min(make_f32(nan), make_f32(nan));
+        assert!(get_f32(result_both_nan).is_nan());
+
+        // Test with zero
+        let plus_zero = 0.0f32;
+        let minus_zero = -0.0f32;
+
+        // Min should prefer -0 over +0
+        let zero_result = get_f32(fpu.min(make_f32(plus_zero), make_f32(minus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_negative());
+
+        let zero_result = get_f32(fpu.min(make_f32(minus_zero), make_f32(plus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_negative());
+
+        let zero_result = get_f32(fpu.min(make_f32(plus_zero), make_f32(minus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_negative());
+    }
+
+    #[test]
+    fn test_max_f64_normal_values() {
+        let mut fpu = FPU::default();
+
+        // Test regular positive values
+        assert_eq!(get_f64(fpu.max(make_f64(1.0), make_f64(2.0))), 2.0);
+        assert_eq!(get_f64(fpu.max(make_f64(2.0), make_f64(1.0))), 2.0);
+
+        // Test regular negative values
+        assert_eq!(get_f64(fpu.max(make_f64(-1.0), make_f64(-2.0))), -1.0);
+        assert_eq!(get_f64(fpu.max(make_f64(-2.0), make_f64(-1.0))), -1.0);
+
+        // Test mixed sign values
+        assert_eq!(get_f64(fpu.max(make_f64(-1.0), make_f64(1.0))), 1.0);
+        assert_eq!(get_f64(fpu.max(make_f64(1.0), make_f64(-1.0))), 1.0);
+    }
+
+    #[test]
+    fn test_min_f64_special_values() {
+        let mut fpu = FPU::default();
+
+        // Test with infinities
+        assert_eq!(get_f64(fpu.min(make_f64(f64::INFINITY), make_f64(1.0))), 1.0);
+        assert_eq!(get_f64(fpu.min(make_f64(1.0), make_f64(f64::INFINITY))), 1.0);
+        assert_eq!(get_f64(fpu.min(make_f64(f64::NEG_INFINITY), make_f64(1.0))), f64::NEG_INFINITY);
+        assert_eq!(get_f64(fpu.min(make_f64(1.0), make_f64(f64::NEG_INFINITY))), f64::NEG_INFINITY);
+
+        // Test with NaN
+        let nan = f64::NAN;
+        let result1 = get_f64(fpu.min(make_f64(nan), make_f64(1.0)));
+        let result2 = get_f64(fpu.min(make_f64(1.0), make_f64(nan)));
+
+        assert_eq!(result1, 1.0); // NaN + non-NaN should return non-NaN
+        assert_eq!(result2, 1.0); // non-NaN + NaN should return non-NaN
+
+        // Test with zero
+        let plus_zero = 0.0f64;
+        let minus_zero = -0.0f64;
+
+        // Min should prefer -0 over +0
+        let zero_result = get_f64(fpu.min(make_f64(plus_zero), make_f64(minus_zero)));
+        assert!(zero_result == 0.0 && zero_result.is_sign_negative());
+    }
+}

src/wrapper/common.rs

@@ -145,6 +145,7 @@ pub trait Float: Sized {
     const FRACTION_BIT: Self::Payload;
     const SIGN_POS: usize;
     const EXPONENT_POS: usize;
+    const DEFAULT_NAN: Self::Payload;
 
     fn set_payload(&mut self, x: Self::Payload);
 

src/wrapper/f32.rs

@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 
+use crate::softfloat::defaultNaNF32UI;
+
 use super::super::softfloat::{
     f32_add, f32_div, f32_eq, f32_eq_signaling, f32_isSignalingNaN, f32_le, f32_le_quiet, f32_lt,
     f32_lt_quiet, f32_mul, f32_mulAdd, f32_rem, f32_roundToInt, f32_sqrt, f32_sub, f32_to_f64,
@@ -30,6 +32,7 @@ impl Float for float32_t {
 
     const EXPONENT_BIT: Self::Payload = 0xff;
     const FRACTION_BIT: Self::Payload = 0x7f_ffff;
+    const DEFAULT_NAN: Self::Payload = defaultNaNF32UI;
     const SIGN_POS: usize = 31;
     const EXPONENT_POS: usize = 23;
 

src/wrapper/f64.rs

@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 
+use crate::softfloat::defaultNaNF64UI;
+
 use super::super::softfloat::{
     f64_add, f64_div, f64_eq, f64_eq_signaling, f64_isSignalingNaN, f64_le, f64_le_quiet, f64_lt,
     f64_lt_quiet, f64_mul, f64_mulAdd, f64_rem, f64_roundToInt, f64_sqrt, f64_sub, f64_to_f32,
@@ -30,6 +32,7 @@ impl Float for float64_t {
 
     const EXPONENT_BIT: Self::Payload = 0x7ff;
     const FRACTION_BIT: Self::Payload = 0xf_ffff_ffff_ffff;
+    const DEFAULT_NAN: Self::Payload = defaultNaNF64UI;
     const SIGN_POS: usize = 63;
     const EXPONENT_POS: usize = 52;