28
28
extern "C" {
29
29
#endif
30
30
31
+ static uint32_t saadcReference = SAADC_CH_CONFIG_REFSEL_Internal ;
32
+ static uint32_t saadcGain = SAADC_CH_CONFIG_GAIN_Gain1_5 ;
33
+
31
34
#define PWM_COUNT 3
32
35
33
36
static NRF_PWM_Type * pwms [PWM_COUNT ] = {
@@ -41,8 +44,6 @@ static uint32_t pwmChannelPins[PWM_COUNT] = {
41
44
0xFFFFFFFF ,
42
45
0xFFFFFFFF
43
46
};
44
-
45
- static uint32_t saadcReference = SAADC_CH_CONFIG_REFSEL_Internal ;
46
47
static uint16_t pwmChannelSequence [PWM_COUNT ];
47
48
48
49
static int readResolution = 10 ;
@@ -76,7 +77,7 @@ static inline uint32_t mapResolution( uint32_t value, uint32_t from, uint32_t to
76
77
}
77
78
78
79
/*
79
- * Internal Reference is at 1.0v
80
+ * Internal Reference is at 0.6v!
80
81
* External Reference should be between 1v and VDDANA-0.6v=2.7v
81
82
*
82
83
* Warning : On Arduino Zero board the input/output voltage for SAMD21G18 is 3.3 volts maximum
@@ -88,10 +89,12 @@ void analogReference( eAnalogReference ulMode )
88
89
case AR_INTERNAL :
89
90
default :
90
91
saadcReference = SAADC_CH_CONFIG_REFSEL_Internal ;
92
+ saadcGain = SAADC_CH_CONFIG_GAIN_Gain1_5 ;
91
93
break ;
92
94
93
95
case AR_VDD4 :
94
96
saadcReference = SAADC_CH_CONFIG_REFSEL_VDD1_4 ;
97
+ saadcGain = SAADC_CH_CONFIG_GAIN_Gain1_4 ;
95
98
break ;
96
99
}
97
100
}
@@ -167,9 +170,9 @@ uint32_t analogRead( uint32_t ulPin )
167
170
NRF_SAADC -> CH [i ].PSELN = SAADC_CH_PSELP_PSELP_NC ;
168
171
NRF_SAADC -> CH [i ].PSELP = SAADC_CH_PSELP_PSELP_NC ;
169
172
}
170
- NRF_SAADC -> CH [0 ].CONFIG = ((SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESP_Pos ) & SAADC_CH_CONFIG_RESP_Msk )
173
+ NRF_SAADC -> CH [0 ].CONFIG = ((SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESP_Pos ) & SAADC_CH_CONFIG_RESP_Msk )
171
174
| ((SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESN_Pos ) & SAADC_CH_CONFIG_RESN_Msk )
172
- | ((SAADC_CH_CONFIG_GAIN_Gain1 << SAADC_CH_CONFIG_GAIN_Pos ) & SAADC_CH_CONFIG_GAIN_Msk )
175
+ | ((saadcGain << SAADC_CH_CONFIG_GAIN_Pos ) & SAADC_CH_CONFIG_GAIN_Msk )
173
176
| ((saadcReference << SAADC_CH_CONFIG_REFSEL_Pos ) & SAADC_CH_CONFIG_REFSEL_Msk )
174
177
| ((SAADC_CH_CONFIG_TACQ_3us << SAADC_CH_CONFIG_TACQ_Pos ) & SAADC_CH_CONFIG_TACQ_Msk )
175
178
| ((SAADC_CH_CONFIG_MODE_SE << SAADC_CH_CONFIG_MODE_Pos ) & SAADC_CH_CONFIG_MODE_Msk );
0 commit comments