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cpu_tb.vvp
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2683 lines (2683 loc) · 93.9 KB
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 9;
:vpi_module "C:\iverilog\lib\ivl\system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
S_0000017a04a7e890 .scope module, "cpu_tb" "cpu_tb" 2 4;
.timescale -8 -9;
L_0000017a04b808d0 .functor BUFZ 32, L_0000017a04b80b70, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b81120 .functor BUFZ 32, L_0000017a04b80860, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b804e0 .functor BUFZ 5, L_0000017a04b24000, C4<00000>, C4<00000>, C4<00000>;
L_0000017a04b807f0 .functor BUFZ 32, L_0000017a04b816b0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b80e10 .functor BUFZ 4, v0000017a04a81070_0, C4<0000>, C4<0000>, C4<0000>;
L_0000017a04b80940 .functor BUFZ 32, v0000017a04a80fd0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b81040 .functor BUFZ 32, L_0000017a04b828d0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b80ef0 .functor BUFZ 32, L_0000017a04a55b30, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b80240 .functor BUFZ 32, v0000017a04b1fcc0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b1ef00_5 .array/port v0000017a04b1ef00, 5;
L_0000017a04b80710 .functor BUFZ 32, v0000017a04b1ef00_5, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b1ef00_6 .array/port v0000017a04b1ef00, 6;
L_0000017a04b80a20 .functor BUFZ 32, v0000017a04b1ef00_6, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b1ef00_7 .array/port v0000017a04b1ef00, 7;
L_0000017a04b80e80 .functor BUFZ 32, v0000017a04b1ef00_7, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b20790_0 .net "alu2", 31 0, L_0000017a04b807f0; 1 drivers
v0000017a04b20830_0 .net "aluctl", 3 0, L_0000017a04b80e10; 1 drivers
v0000017a04b21870_0 .net "alures", 31 0, L_0000017a04b80940; 1 drivers
v0000017a04b21c30_0 .var "clk", 0 0;
v0000017a04b21d70_0 .var "clk_cc", 0 0;
v0000017a04b21eb0_0 .net "instr", 31 0, L_0000017a04b80ef0; 1 drivers
v0000017a04b21f50_0 .net "pc", 31 0, L_0000017a04b80240; 1 drivers
v0000017a04b21ff0_0 .net "rd1", 4 0, L_0000017a04b804e0; 1 drivers
v0000017a04b20330_0 .var "reset", 0 0;
v0000017a04b203d0_0 .net "rs1", 31 0, L_0000017a04b808d0; 1 drivers
v0000017a04b20470_0 .net "rs2", 31 0, L_0000017a04b81120; 1 drivers
v0000017a04b20a10_0 .net "wr_dat", 31 0, L_0000017a04b81040; 1 drivers
v0000017a04b20ab0_0 .net "x5", 31 0, L_0000017a04b80710; 1 drivers
v0000017a04b22340_0 .net "x6", 31 0, L_0000017a04b80a20; 1 drivers
v0000017a04b22fc0_0 .net "x7", 31 0, L_0000017a04b80e80; 1 drivers
S_0000017a04a8deb0 .scope module, "dut" "scp_riscv" 2 11, 3 15 0, S_0000017a04a7e890;
.timescale -8 -9;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "clk_cc";
.port_info 2 /INPUT 1 "reset";
L_0000017a04a55ba0 .functor BUFZ 1, v0000017a04b1b0c0_0, C4<0>, C4<0>, C4<0>;
v0000017a04b21370_0 .net "ALUControl", 3 0, v0000017a04a81070_0; 1 drivers
v0000017a04b21410_0 .net "ALUResult", 31 0, v0000017a04a80fd0_0; 1 drivers
v0000017a04b20e70_0 .net "ALUop", 1 0, v0000017a04b1f9a0_0; 1 drivers
v0000017a04b219b0_0 .net "ALUop2", 31 0, L_0000017a04b816b0; 1 drivers
v0000017a04b20f10_0 .net "AluSrc", 0 0, v0000017a04b1fae0_0; 1 drivers
v0000017a04b201f0_0 .net "ImmSel", 1 0, v0000017a04b1f360_0; 1 drivers
v0000017a04b21a50_0 .net "MemRead", 0 0, v0000017a04b1f400_0; 1 drivers
v0000017a04b21af0_0 .net "MemWrite", 0 0, v0000017a04b1e8c0_0; 1 drivers
v0000017a04b21730_0 .net "MemtoReg", 0 0, v0000017a04b1f860_0; 1 drivers
v0000017a04b206f0_0 .net "Wait", 0 0, v0000017a04b1b0c0_0; 1 drivers
L_0000017a04b241c8 .functor BUFT 1, C4<00000000000000000000000000000100>, C4<0>, C4<0>, C4<0>;
v0000017a04b214b0_0 .net/2u *"_ivl_0", 31 0, L_0000017a04b241c8; 1 drivers
L_0000017a04b245b8 .functor BUFT 1, C4<000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0000017a04b20b50_0 .net *"_ivl_25", 23 0, L_0000017a04b245b8; 1 drivers
L_0000017a04b24600 .functor BUFT 1, C4<000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0000017a04b20d30_0 .net *"_ivl_30", 23 0, L_0000017a04b24600; 1 drivers
v0000017a04b21e10_0 .net "branch", 0 0, v0000017a04b1e1e0_0; 1 drivers
v0000017a04b20dd0_0 .net "clk", 0 0, v0000017a04b21c30_0; 1 drivers
v0000017a04b20fb0_0 .net "clk_cc", 0 0, v0000017a04b21d70_0; 1 drivers
v0000017a04b205b0_0 .net "hit1", 0 0, v0000017a04b1bd40_0; 1 drivers
v0000017a04b208d0_0 .net "hit2", 0 0, v0000017a04b1aa80_0; 1 drivers
v0000017a04b21550_0 .net "imm", 31 0, L_0000017a04b82a10; 1 drivers
v0000017a04b20c90_0 .net "instr", 31 0, L_0000017a04a55b30; 1 drivers
v0000017a04b215f0_0 .net "output_data", 31 0, L_0000017a04b82150; 1 drivers
v0000017a04b22090_0 .net "pc", 31 0, v0000017a04b1fcc0_0; 1 drivers
v0000017a04b20bf0_0 .net "pc_next", 31 0, L_0000017a04b23ba0; 1 drivers
v0000017a04b20650_0 .net "rd", 4 0, L_0000017a04b24000; 1 drivers
v0000017a04b21050_0 .net "reg_read_data_1", 31 0, L_0000017a04b80b70; 1 drivers
v0000017a04b210f0_0 .net "reg_read_data_2", 31 0, L_0000017a04b80860; 1 drivers
v0000017a04b20290_0 .net "reg_write_data", 31 0, L_0000017a04b828d0; 1 drivers
v0000017a04b21190_0 .net "reg_write_en", 0 0, v0000017a04b1fa40_0; 1 drivers
v0000017a04b21b90_0 .net "reset", 0 0, v0000017a04b20330_0; 1 drivers
v0000017a04b21690_0 .net "rs1", 4 0, L_0000017a04b22de0; 1 drivers
v0000017a04b21230_0 .net "rs2", 4 0, L_0000017a04b225c0; 1 drivers
v0000017a04b21cd0_0 .net "sign_extended_data", 31 0, L_0000017a04b826f0; 1 drivers
v0000017a04b212d0_0 .net "stall", 0 0, L_0000017a04a55ba0; 1 drivers
v0000017a04b20970_0 .net "stored_address", 31 0, v0000017a04b1ddf0_0; 1 drivers
v0000017a04b20510_0 .net "stored_data", 31 0, L_0000017a04b82650; 1 drivers
v0000017a04b217d0_0 .net "zero", 0 0, L_0000017a04b81390; 1 drivers
L_0000017a04b23ba0 .arith/sum 32, v0000017a04b1fcc0_0, L_0000017a04b241c8;
L_0000017a04b22de0 .part L_0000017a04a55b30, 15, 5;
L_0000017a04b225c0 .part L_0000017a04a55b30, 20, 5;
L_0000017a04b24000 .part L_0000017a04a55b30, 7, 5;
L_0000017a04b240a0 .part L_0000017a04a55b30, 0, 7;
L_0000017a04b81bb0 .part L_0000017a04a55b30, 12, 3;
L_0000017a04b82dd0 .part L_0000017a04a55b30, 30, 1;
L_0000017a04b816b0 .functor MUXZ 32, L_0000017a04b80860, L_0000017a04b82a10, v0000017a04b1fae0_0, C4<>;
L_0000017a04b812f0 .part L_0000017a04b80860, 0, 8;
L_0000017a04b82150 .concat [ 8 24 0 0], v0000017a04b1c4f0_0, L_0000017a04b245b8;
L_0000017a04b82650 .concat [ 8 24 0 0], v0000017a04b1c270_0, L_0000017a04b24600;
L_0000017a04b81250 .part L_0000017a04b82650, 0, 8;
L_0000017a04b828d0 .functor MUXZ 32, v0000017a04a80fd0_0, L_0000017a04b826f0, v0000017a04b1f860_0, C4<>;
S_0000017a04a98440 .scope module, "alu" "alu" 3 93, 4 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 32 "a";
.port_info 1 /INPUT 32 "b";
.port_info 2 /INPUT 4 "alu_control";
.port_info 3 /OUTPUT 32 "alu_result";
.port_info 4 /OUTPUT 1 "zero_flag";
P_0000017a04abd190 .param/l "ADD" 1 4 17, C4<0010>;
P_0000017a04abd1c8 .param/l "AND" 1 4 15, C4<0000>;
P_0000017a04abd200 .param/l "OR" 1 4 16, C4<0001>;
P_0000017a04abd238 .param/l "SLT" 1 4 19, C4<1000>;
P_0000017a04abd270 .param/l "SUB" 1 4 18, C4<0010>;
L_0000017a04b244e0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0000017a04a81d90_0 .net/2u *"_ivl_0", 31 0, L_0000017a04b244e0; 1 drivers
v0000017a04a80670_0 .net *"_ivl_2", 0 0, L_0000017a04b82290; 1 drivers
L_0000017a04b24528 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
v0000017a04a81e30_0 .net/2u *"_ivl_4", 0 0, L_0000017a04b24528; 1 drivers
L_0000017a04b24570 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000017a04a80710_0 .net/2u *"_ivl_6", 0 0, L_0000017a04b24570; 1 drivers
v0000017a04a81ed0_0 .net "a", 31 0, L_0000017a04b80b70; alias, 1 drivers
v0000017a04a80210_0 .net "alu_control", 3 0, v0000017a04a81070_0; alias, 1 drivers
v0000017a04a80fd0_0 .var "alu_result", 31 0;
v0000017a04a816b0_0 .net "b", 31 0, L_0000017a04b816b0; alias, 1 drivers
v0000017a04a80170_0 .net "zero_flag", 0 0, L_0000017a04b81390; alias, 1 drivers
E_0000017a04aabda0 .event anyedge, v0000017a04a80210_0, v0000017a04a81ed0_0, v0000017a04a816b0_0;
L_0000017a04b82290 .cmp/eq 32, v0000017a04a80fd0_0, L_0000017a04b244e0;
L_0000017a04b81390 .functor MUXZ 1, L_0000017a04b24570, L_0000017a04b24528, L_0000017a04b82290, C4<>;
S_0000017a04a42ed0 .scope module, "alu_ctrl" "alu_control" 3 84, 5 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 2 "aluOP";
.port_info 1 /INPUT 3 "funct3";
.port_info 2 /INPUT 1 "funct7";
.port_info 3 /OUTPUT 4 "aluControl";
P_0000017a04a43060 .param/l "BEQ_OP" 1 5 19, C4<000001>;
P_0000017a04a43098 .param/l "LOAD_STORE_OP" 1 5 18, C4<000000>;
P_0000017a04a430d0 .param/l "R_ADD" 1 5 24, C4<0000>;
P_0000017a04a43108 .param/l "R_AND" 1 5 26, C4<0111>;
P_0000017a04a43140 .param/l "R_OP" 1 5 20, C4<000010>;
P_0000017a04a43178 .param/l "R_OR" 1 5 27, C4<0110>;
P_0000017a04a431b0 .param/l "R_SUB" 1 5 25, C4<1000>;
v0000017a04a80990_0 .net *"_ivl_0", 3 0, L_0000017a04b82ab0; 1 drivers
v0000017a04a81070_0 .var "aluControl", 3 0;
v0000017a04a81f70_0 .net "aluOP", 1 0, v0000017a04b1f9a0_0; alias, 1 drivers
v0000017a04a80850_0 .net "funct", 0 0, L_0000017a04b82bf0; 1 drivers
v0000017a04a808f0_0 .net "funct3", 2 0, L_0000017a04b81bb0; 1 drivers
v0000017a04a80a30_0 .net "funct7", 0 0, L_0000017a04b82dd0; 1 drivers
E_0000017a04aab760 .event anyedge, v0000017a04a81f70_0, v0000017a04a80850_0;
L_0000017a04b82ab0 .concat [ 3 1 0 0], L_0000017a04b81bb0, L_0000017a04b82dd0;
L_0000017a04b82bf0 .part L_0000017a04b82ab0, 0, 1;
S_0000017a04a3dc90 .scope module, "cache" "CACHE_CONTROLLER" 3 102, 6 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 32 "address";
.port_info 1 /INPUT 1 "clk_cc";
.port_info 2 /INPUT 8 "data";
.port_info 3 /INPUT 1 "mode";
.port_info 4 /OUTPUT 8 "output_data";
.port_info 5 /OUTPUT 1 "hit1";
.port_info 6 /OUTPUT 1 "hit2";
.port_info 7 /OUTPUT 1 "Wait";
.port_info 8 /OUTPUT 32 "stored_address";
.port_info 9 /OUTPUT 8 "stored_data";
P_0000017a04b19c90 .param/l "byte_size" 0 6 26, +C4<00000000000000000000000000001000>;
P_0000017a04b19cc8 .param/l "l1_block_bit_size" 0 6 35, +C4<00000000000000000000000000100000>;
P_0000017a04b19d00 .param/l "l1_latency" 0 6 155, +C4<00000000000000000000000000000001>;
P_0000017a04b19d38 .param/l "l2_block_bit_size" 0 6 71, +C4<00000000000000000000000010000000>;
P_0000017a04b19d70 .param/l "l2_latency" 0 6 156, +C4<00000000000000000000000000000011>;
P_0000017a04b19da8 .param/l "main_memory_block_size" 0 6 123, +C4<00000000000000000000000000100000>;
P_0000017a04b19de0 .param/l "main_memory_byte_size" 0 6 125, +C4<00000000000000000001000000000000>;
P_0000017a04b19e18 .param/l "main_memory_latency" 0 6 157, +C4<00000000000000000000000000001010>;
P_0000017a04b19e50 .param/l "no_of_address_bits" 0 6 24, +C4<00000000000000000000000000100000>;
P_0000017a04b19e88 .param/l "no_of_blkoffset_bits" 0 6 25, +C4<00000000000000000000000000000010>;
P_0000017a04b19ec0 .param/l "no_of_bytes_l1_block" 0 6 34, +C4<00000000000000000000000000000100>;
P_0000017a04b19ef8 .param/l "no_of_bytes_l2_block" 0 6 70, +C4<00000000000000000000000000010000>;
P_0000017a04b19f30 .param/l "no_of_bytes_main_memory_block" 0 6 124, +C4<00000000000000000000000000000100>;
P_0000017a04b19f68 .param/l "no_of_l1_blocks" 0 6 33, +C4<00000000000000000000000000100000>;
P_0000017a04b19fa0 .param/l "no_of_l1_index_bits" 0 6 36, +C4<00000000000000000000000000000101>;
P_0000017a04b19fd8 .param/l "no_of_l1_tag_bits" 0 6 37, +C4<00000000000000000000000000011001>;
P_0000017a04b1a010 .param/l "no_of_l2_blocks" 0 6 69, +C4<00000000000000000000000001000000>;
P_0000017a04b1a048 .param/l "no_of_l2_index_bits" 0 6 72, +C4<00000000000000000000000000000110>;
P_0000017a04b1a080 .param/l "no_of_l2_tag_bits" 0 6 73, +C4<00000000000000000000000000011000>;
P_0000017a04b1a0b8 .param/l "no_of_l2_ways" 0 6 67, +C4<00000000000000000000000000000100>;
P_0000017a04b1a0f0 .param/l "no_of_l2_ways_bits" 0 6 68, +C4<00000000000000000000000000000010>;
P_0000017a04b1a128 .param/l "no_of_main_memory_blocks" 0 6 122, +C4<00000000000000000000010000000000>;
v0000017a04b1b700_0 .var "Ccount", 0 0;
v0000017a04b1b0c0_0 .var "Wait", 0 0;
v0000017a04b1b2a0_0 .net "address", 31 0, v0000017a04a80fd0_0; alias, 1 drivers
v0000017a04b1bca0_0 .net "clk_cc", 0 0, v0000017a04b21d70_0; alias, 1 drivers
v0000017a04b1af80_0 .net "data", 7 0, L_0000017a04b812f0; 1 drivers
v0000017a04b1b7a0_0 .var "dummy_hit", 0 0;
v0000017a04b1c060_0 .var "dummy_hit_w", 0 0;
v0000017a04b1bd40_0 .var "hit1", 0 0;
v0000017a04b1aa80_0 .var "hit2", 0 0;
v0000017a04b1b340_0 .var "is_L2_delay", 0 0;
v0000017a04b1b160_0 .var "is_L2_delay_w", 0 0;
v0000017a04b1ba20 .array "l1_cache_memory", 31 0, 31 0;
v0000017a04b1a6c0_0 .var "l1_evict_tag", 24 0;
v0000017a04b1b520_0 .var "l1_evict_tag2", 24 0;
v0000017a04b1abc0_0 .var "l1_evict_tag3", 24 0;
v0000017a04b1b3e0_0 .var "l1_index", 4 0;
v0000017a04b1a1c0_0 .var/i "l1_l2_check", 31 0;
v0000017a04b1ac60_0 .var/i "l1_l2_check2", 31 0;
v0000017a04b1bde0_0 .var/i "l1_l2_check2a", 31 0;
v0000017a04b1bb60_0 .var/i "l1_l2_check2b", 31 0;
v0000017a04b1b5c0_0 .var/i "l1_l2_checka", 31 0;
v0000017a04b1b660_0 .var/i "l1_l2_checkb", 31 0;
v0000017a04b1a3a0_0 .var "l1_tag", 24 0;
v0000017a04b1b480 .array "l1_tag_array", 31 0, 24 0;
v0000017a04b1a8a0_0 .var "l1_to_l2_index", 5 0;
v0000017a04b1be80_0 .var "l1_to_l2_index2", 5 0;
v0000017a04b1a940_0 .var "l1_to_l2_index3", 5 0;
v0000017a04b1a800_0 .var "l1_to_l2_search", 0 0;
v0000017a04b1aee0_0 .var "l1_to_l2_search2", 0 0;
v0000017a04b1b020_0 .var "l1_to_l2_search3", 0 0;
v0000017a04b1b200_0 .var "l1_to_l2_tag", 23 0;
v0000017a04b1a9e0_0 .var "l1_to_l2_tag2", 23 0;
v0000017a04b1a4e0_0 .var "l1_to_l2_tag3", 23 0;
v0000017a04b1b840 .array "l1_valid", 31 0, 0 0;
v0000017a04b1a760 .array "l2_cache_memory", 63 0, 127 0;
v0000017a04b1ad00_0 .var/i "l2_check", 31 0;
v0000017a04b1b8e0_0 .var/i "l2_check2", 31 0;
v0000017a04b1b980_0 .var/i "l2_checka", 31 0;
v0000017a04b1ab20_0 .var "l2_delay_counter", 1 0;
v0000017a04b1a620_0 .var "l2_delay_counter_w", 1 0;
v0000017a04b1ada0_0 .var "l2_evict_tag", 23 0;
v0000017a04b1a260_0 .var "l2_index", 5 0;
v0000017a04b1a300_0 .var/i "l2_iterator", 31 0;
v0000017a04b1bac0_0 .var/i "l2_mm_check", 31 0;
v0000017a04b1bc00_0 .var/i "l2_mm_check2", 31 0;
v0000017a04b1bf20_0 .var/i "l2_mm_iterator", 31 0;
v0000017a04b1a440_0 .var "l2_tag", 23 0;
v0000017a04b1a580 .array "l2_tag_array", 63 0, 95 0;
v0000017a04b1ae40 .array "l2_valid", 63 0, 3 0;
v0000017a04b1d710 .array "lru", 63 0, 7 0;
v0000017a04b1cdb0_0 .var "lru_value", 1 0;
v0000017a04b1c1d0_0 .var "lru_value2", 1 0;
v0000017a04b1dd50_0 .var "lru_value_dummy", 1 0;
v0000017a04b1c450_0 .var "lru_value_dummy2", 1 0;
v0000017a04b1e070 .array "main_memory", 1023 0, 31 0;
v0000017a04b1d990_0 .var "main_memory_blk_id", 29 0;
v0000017a04b1c770_0 .var "main_memory_delay_counter", 3 0;
v0000017a04b1d5d0_0 .var "main_memory_delay_counter_w", 3 0;
v0000017a04b1cc70_0 .net "mode", 0 0, v0000017a04b1e8c0_0; alias, 1 drivers
v0000017a04b1d530_0 .var "offset", 1 0;
v0000017a04b1c4f0_0 .var "output_data", 7 0;
v0000017a04b1ddf0_0 .var "stored_address", 31 0;
v0000017a04b1c270_0 .var "stored_data", 7 0;
v0000017a04b1df30_0 .var "stored_mode", 0 0;
E_0000017a04aabde0 .event posedge, v0000017a04b1bca0_0;
S_0000017a04a3de20 .scope begin, "initialization" "initialization" 6 106, 6 106 0, S_0000017a04a3dc90;
.timescale -8 -9;
v0000017a04a80ad0_0 .var/i "i", 31 0;
S_0000017a04a32360 .scope begin, "initialization_l1" "initialization_l1" 6 52, 6 52 0, S_0000017a04a3dc90;
.timescale -8 -9;
v0000017a04a80b70_0 .var/i "i", 31 0;
S_0000017a04a324f0 .scope begin, "initialization_main_memory" "initialization_main_memory" 6 144, 6 144 0, S_0000017a04a3dc90;
.timescale -8 -9;
v0000017a04b1bfc0_0 .var/i "i", 31 0;
S_0000017a04a404a0 .scope module, "imm_gen" "Sign_Extend" 3 81, 7 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 32 "in";
.port_info 1 /OUTPUT 32 "imm_ext";
.port_info 2 /INPUT 2 "ImmSrc";
v0000017a04b1c950_0 .net "ImmSrc", 1 0, v0000017a04b1f360_0; alias, 1 drivers
L_0000017a04b24378 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0000017a04b1dcb0_0 .net/2u *"_ivl_0", 1 0, L_0000017a04b24378; 1 drivers
v0000017a04b1d3f0_0 .net *"_ivl_11", 4 0, L_0000017a04b22a20; 1 drivers
v0000017a04b1c590_0 .net *"_ivl_12", 31 0, L_0000017a04b22ac0; 1 drivers
L_0000017a04b243c0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000017a04b1d2b0_0 .net/2u *"_ivl_14", 1 0, L_0000017a04b243c0; 1 drivers
v0000017a04b1de90_0 .net *"_ivl_16", 0 0, L_0000017a04b23100; 1 drivers
v0000017a04b1c630_0 .net *"_ivl_19", 0 0, L_0000017a04b82f10; 1 drivers
v0000017a04b1cf90_0 .net *"_ivl_2", 0 0, L_0000017a04b22700; 1 drivers
v0000017a04b1c310_0 .net *"_ivl_20", 19 0, L_0000017a04b82470; 1 drivers
v0000017a04b1d670_0 .net *"_ivl_23", 11 0, L_0000017a04b82fb0; 1 drivers
v0000017a04b1d7b0_0 .net *"_ivl_24", 31 0, L_0000017a04b82790; 1 drivers
L_0000017a04b24408 .functor BUFT 1, C4<10>, C4<0>, C4<0>, C4<0>;
v0000017a04b1cd10_0 .net/2u *"_ivl_26", 1 0, L_0000017a04b24408; 1 drivers
v0000017a04b1c6d0_0 .net *"_ivl_28", 0 0, L_0000017a04b82d30; 1 drivers
v0000017a04b1d210_0 .net *"_ivl_31", 0 0, L_0000017a04b81930; 1 drivers
v0000017a04b1ce50_0 .net *"_ivl_32", 18 0, L_0000017a04b821f0; 1 drivers
v0000017a04b1dfd0_0 .net *"_ivl_35", 0 0, L_0000017a04b825b0; 1 drivers
v0000017a04b1c810_0 .net *"_ivl_37", 0 0, L_0000017a04b81c50; 1 drivers
v0000017a04b1c8b0_0 .net *"_ivl_39", 5 0, L_0000017a04b82330; 1 drivers
v0000017a04b1d0d0_0 .net *"_ivl_41", 3 0, L_0000017a04b83050; 1 drivers
L_0000017a04b24450 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000017a04b1da30_0 .net/2u *"_ivl_42", 0 0, L_0000017a04b24450; 1 drivers
v0000017a04b1c3b0_0 .net *"_ivl_44", 31 0, L_0000017a04b81cf0; 1 drivers
v0000017a04b1c9f0_0 .net *"_ivl_47", 0 0, L_0000017a04b814d0; 1 drivers
v0000017a04b1cb30_0 .net *"_ivl_48", 11 0, L_0000017a04b81570; 1 drivers
v0000017a04b1cbd0_0 .net *"_ivl_5", 0 0, L_0000017a04b22980; 1 drivers
v0000017a04b1cef0_0 .net *"_ivl_51", 7 0, L_0000017a04b82010; 1 drivers
v0000017a04b1ca90_0 .net *"_ivl_53", 0 0, L_0000017a04b82e70; 1 drivers
v0000017a04b1d030_0 .net *"_ivl_55", 9 0, L_0000017a04b82970; 1 drivers
L_0000017a04b24498 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000017a04b1d170_0 .net/2u *"_ivl_56", 0 0, L_0000017a04b24498; 1 drivers
v0000017a04b1d350_0 .net *"_ivl_58", 31 0, L_0000017a04b823d0; 1 drivers
v0000017a04b1d490_0 .net *"_ivl_6", 19 0, L_0000017a04b234c0; 1 drivers
v0000017a04b1d850_0 .net *"_ivl_60", 31 0, L_0000017a04b81890; 1 drivers
v0000017a04b1d8f0_0 .net *"_ivl_62", 31 0, L_0000017a04b82510; 1 drivers
v0000017a04b1dad0_0 .net *"_ivl_9", 6 0, L_0000017a04b23560; 1 drivers
v0000017a04b1db70_0 .net "imm_ext", 31 0, L_0000017a04b82a10; alias, 1 drivers
v0000017a04b1dc10_0 .net "in", 31 0, L_0000017a04a55b30; alias, 1 drivers
L_0000017a04b22700 .cmp/eq 2, v0000017a04b1f360_0, L_0000017a04b24378;
L_0000017a04b22980 .part L_0000017a04a55b30, 31, 1;
LS_0000017a04b234c0_0_0 .concat [ 1 1 1 1], L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980;
LS_0000017a04b234c0_0_4 .concat [ 1 1 1 1], L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980;
LS_0000017a04b234c0_0_8 .concat [ 1 1 1 1], L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980;
LS_0000017a04b234c0_0_12 .concat [ 1 1 1 1], L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980;
LS_0000017a04b234c0_0_16 .concat [ 1 1 1 1], L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980, L_0000017a04b22980;
LS_0000017a04b234c0_1_0 .concat [ 4 4 4 4], LS_0000017a04b234c0_0_0, LS_0000017a04b234c0_0_4, LS_0000017a04b234c0_0_8, LS_0000017a04b234c0_0_12;
LS_0000017a04b234c0_1_4 .concat [ 4 0 0 0], LS_0000017a04b234c0_0_16;
L_0000017a04b234c0 .concat [ 16 4 0 0], LS_0000017a04b234c0_1_0, LS_0000017a04b234c0_1_4;
L_0000017a04b23560 .part L_0000017a04a55b30, 25, 7;
L_0000017a04b22a20 .part L_0000017a04a55b30, 7, 5;
L_0000017a04b22ac0 .concat [ 5 7 20 0], L_0000017a04b22a20, L_0000017a04b23560, L_0000017a04b234c0;
L_0000017a04b23100 .cmp/eq 2, v0000017a04b1f360_0, L_0000017a04b243c0;
L_0000017a04b82f10 .part L_0000017a04a55b30, 31, 1;
LS_0000017a04b82470_0_0 .concat [ 1 1 1 1], L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10;
LS_0000017a04b82470_0_4 .concat [ 1 1 1 1], L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10;
LS_0000017a04b82470_0_8 .concat [ 1 1 1 1], L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10;
LS_0000017a04b82470_0_12 .concat [ 1 1 1 1], L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10;
LS_0000017a04b82470_0_16 .concat [ 1 1 1 1], L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10, L_0000017a04b82f10;
LS_0000017a04b82470_1_0 .concat [ 4 4 4 4], LS_0000017a04b82470_0_0, LS_0000017a04b82470_0_4, LS_0000017a04b82470_0_8, LS_0000017a04b82470_0_12;
LS_0000017a04b82470_1_4 .concat [ 4 0 0 0], LS_0000017a04b82470_0_16;
L_0000017a04b82470 .concat [ 16 4 0 0], LS_0000017a04b82470_1_0, LS_0000017a04b82470_1_4;
L_0000017a04b82fb0 .part L_0000017a04a55b30, 20, 12;
L_0000017a04b82790 .concat [ 12 20 0 0], L_0000017a04b82fb0, L_0000017a04b82470;
L_0000017a04b82d30 .cmp/eq 2, v0000017a04b1f360_0, L_0000017a04b24408;
L_0000017a04b81930 .part L_0000017a04a55b30, 31, 1;
LS_0000017a04b821f0_0_0 .concat [ 1 1 1 1], L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930;
LS_0000017a04b821f0_0_4 .concat [ 1 1 1 1], L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930;
LS_0000017a04b821f0_0_8 .concat [ 1 1 1 1], L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930;
LS_0000017a04b821f0_0_12 .concat [ 1 1 1 1], L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930;
LS_0000017a04b821f0_0_16 .concat [ 1 1 1 0], L_0000017a04b81930, L_0000017a04b81930, L_0000017a04b81930;
LS_0000017a04b821f0_1_0 .concat [ 4 4 4 4], LS_0000017a04b821f0_0_0, LS_0000017a04b821f0_0_4, LS_0000017a04b821f0_0_8, LS_0000017a04b821f0_0_12;
LS_0000017a04b821f0_1_4 .concat [ 3 0 0 0], LS_0000017a04b821f0_0_16;
L_0000017a04b821f0 .concat [ 16 3 0 0], LS_0000017a04b821f0_1_0, LS_0000017a04b821f0_1_4;
L_0000017a04b825b0 .part L_0000017a04a55b30, 31, 1;
L_0000017a04b81c50 .part L_0000017a04a55b30, 7, 1;
L_0000017a04b82330 .part L_0000017a04a55b30, 25, 6;
L_0000017a04b83050 .part L_0000017a04a55b30, 8, 4;
LS_0000017a04b81cf0_0_0 .concat [ 1 4 6 1], L_0000017a04b24450, L_0000017a04b83050, L_0000017a04b82330, L_0000017a04b81c50;
LS_0000017a04b81cf0_0_4 .concat [ 1 19 0 0], L_0000017a04b825b0, L_0000017a04b821f0;
L_0000017a04b81cf0 .concat [ 12 20 0 0], LS_0000017a04b81cf0_0_0, LS_0000017a04b81cf0_0_4;
L_0000017a04b814d0 .part L_0000017a04a55b30, 31, 1;
LS_0000017a04b81570_0_0 .concat [ 1 1 1 1], L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0;
LS_0000017a04b81570_0_4 .concat [ 1 1 1 1], L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0;
LS_0000017a04b81570_0_8 .concat [ 1 1 1 1], L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0, L_0000017a04b814d0;
L_0000017a04b81570 .concat [ 4 4 4 0], LS_0000017a04b81570_0_0, LS_0000017a04b81570_0_4, LS_0000017a04b81570_0_8;
L_0000017a04b82010 .part L_0000017a04a55b30, 12, 8;
L_0000017a04b82e70 .part L_0000017a04a55b30, 20, 1;
L_0000017a04b82970 .part L_0000017a04a55b30, 21, 10;
LS_0000017a04b823d0_0_0 .concat [ 1 10 1 8], L_0000017a04b24498, L_0000017a04b82970, L_0000017a04b82e70, L_0000017a04b82010;
LS_0000017a04b823d0_0_4 .concat [ 12 0 0 0], L_0000017a04b81570;
L_0000017a04b823d0 .concat [ 20 12 0 0], LS_0000017a04b823d0_0_0, LS_0000017a04b823d0_0_4;
L_0000017a04b81890 .functor MUXZ 32, L_0000017a04b823d0, L_0000017a04b81cf0, L_0000017a04b82d30, C4<>;
L_0000017a04b82510 .functor MUXZ 32, L_0000017a04b81890, L_0000017a04b82790, L_0000017a04b23100, C4<>;
L_0000017a04b82a10 .functor MUXZ 32, L_0000017a04b82510, L_0000017a04b22ac0, L_0000017a04b22700, C4<>;
S_0000017a04a2b9a0 .scope module, "main_control_unit" "control_unit" 3 54, 8 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 7 "opcode";
.port_info 1 /OUTPUT 2 "ImmSel";
.port_info 2 /OUTPUT 2 "aluOP";
.port_info 3 /OUTPUT 1 "reg_write_en";
.port_info 4 /OUTPUT 1 "aluSrc";
.port_info 5 /OUTPUT 1 "MemtoReg";
.port_info 6 /OUTPUT 1 "MemRead";
.port_info 7 /OUTPUT 1 "MemWrite";
.port_info 8 /OUTPUT 1 "branch";
P_0000017a04a8e040 .param/l "BEQ_OP" 1 8 16, C4<1100011>;
P_0000017a04a8e078 .param/l "LOAD_OP" 1 8 14, C4<0000011>;
P_0000017a04a8e0b0 .param/l "R_OP" 1 8 13, C4<0110011>;
P_0000017a04a8e0e8 .param/l "STORE_OP" 1 8 15, C4<0100011>;
v0000017a04b1f360_0 .var "ImmSel", 1 0;
v0000017a04b1f400_0 .var "MemRead", 0 0;
v0000017a04b1e8c0_0 .var "MemWrite", 0 0;
v0000017a04b1f860_0 .var "MemtoReg", 0 0;
v0000017a04b1f9a0_0 .var "aluOP", 1 0;
v0000017a04b1fae0_0 .var "aluSrc", 0 0;
v0000017a04b1e1e0_0 .var "branch", 0 0;
v0000017a04b1e960_0 .net "opcode", 6 0, L_0000017a04b240a0; 1 drivers
v0000017a04b1fa40_0 .var "reg_write_en", 0 0;
E_0000017a04aab8a0 .event anyedge, v0000017a04b1e960_0;
S_0000017a04a4f140 .scope module, "program_counter" "pc" 3 35, 9 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset";
.port_info 2 /INPUT 32 "pc_in";
.port_info 3 /OUTPUT 32 "pc_out";
v0000017a04b1f2c0_0 .net "clk", 0 0, v0000017a04b21c30_0; alias, 1 drivers
v0000017a04b1f540_0 .net "pc_in", 31 0, L_0000017a04b23ba0; alias, 1 drivers
v0000017a04b1fcc0_0 .var "pc_out", 31 0;
v0000017a04b1f7c0_0 .net "reset", 0 0, v0000017a04b20330_0; alias, 1 drivers
E_0000017a04aabe60 .event posedge, v0000017a04b1f7c0_0, v0000017a04b1f2c0_0;
S_0000017a04a4f2d0 .scope module, "reg_file" "register_file" 3 69, 10 3 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset";
.port_info 2 /INPUT 5 "reg_read_addr_1";
.port_info 3 /OUTPUT 32 "reg_read_data_1";
.port_info 4 /INPUT 5 "reg_read_addr_2";
.port_info 5 /OUTPUT 32 "reg_read_data_2";
.port_info 6 /INPUT 1 "reg_write_en";
.port_info 7 /INPUT 5 "reg_write_addr";
.port_info 8 /INPUT 32 "reg_write_data";
L_0000017a04b80b70 .functor BUFZ 32, L_0000017a04b22200, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0000017a04b80860 .functor BUFZ 32, L_0000017a04b23060, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b1f4a0_0 .net *"_ivl_0", 31 0, L_0000017a04b22200; 1 drivers
v0000017a04b1fb80_0 .net *"_ivl_10", 6 0, L_0000017a04b22d40; 1 drivers
L_0000017a04b24330 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000017a04b1f900_0 .net *"_ivl_13", 1 0, L_0000017a04b24330; 1 drivers
v0000017a04b1ec80_0 .net *"_ivl_2", 6 0, L_0000017a04b222a0; 1 drivers
L_0000017a04b242e8 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000017a04b1f5e0_0 .net *"_ivl_5", 1 0, L_0000017a04b242e8; 1 drivers
v0000017a04b1e320_0 .net *"_ivl_8", 31 0, L_0000017a04b23060; 1 drivers
v0000017a04b1ed20_0 .net "clk", 0 0, v0000017a04b21c30_0; alias, 1 drivers
v0000017a04b1e640_0 .var/i "i", 31 0;
v0000017a04b1ef00 .array "reg_file", 0 31, 31 0;
v0000017a04b1e500_0 .net "reg_read_addr_1", 4 0, L_0000017a04b22de0; alias, 1 drivers
v0000017a04b1efa0_0 .net "reg_read_addr_2", 4 0, L_0000017a04b225c0; alias, 1 drivers
v0000017a04b1edc0_0 .net "reg_read_data_1", 31 0, L_0000017a04b80b70; alias, 1 drivers
v0000017a04b1f680_0 .net "reg_read_data_2", 31 0, L_0000017a04b80860; alias, 1 drivers
v0000017a04b1f720_0 .net "reg_write_addr", 4 0, L_0000017a04b24000; alias, 1 drivers
v0000017a04b1ebe0_0 .net "reg_write_data", 31 0, L_0000017a04b828d0; alias, 1 drivers
v0000017a04b1e3c0_0 .net "reg_write_en", 0 0, v0000017a04b1fa40_0; alias, 1 drivers
o0000017a04ac80c8 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b1f0e0_0 .net "reset", 0 0, o0000017a04ac80c8; 0 drivers
E_0000017a04aab920 .event posedge, v0000017a04b1f2c0_0;
L_0000017a04b22200 .array/port v0000017a04b1ef00, L_0000017a04b222a0;
L_0000017a04b222a0 .concat [ 5 2 0 0], L_0000017a04b22de0, L_0000017a04b242e8;
L_0000017a04b23060 .array/port v0000017a04b1ef00, L_0000017a04b22d40;
L_0000017a04b22d40 .concat [ 5 2 0 0], L_0000017a04b225c0, L_0000017a04b24330;
S_0000017a04a22e40 .scope module, "rom" "instr_mem" 3 46, 11 2 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 32 "pc";
.port_info 1 /INPUT 1 "reset";
.port_info 2 /OUTPUT 32 "instr";
L_0000017a04a55b30 .functor BUFZ 32, L_0000017a04b23e20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0000017a04b1f040_0 .net *"_ivl_0", 7 0, L_0000017a04b22c00; 1 drivers
L_0000017a04b24258 .functor BUFT 1, C4<00000000000000000000000000000010>, C4<0>, C4<0>, C4<0>;
v0000017a04b1f180_0 .net/2u *"_ivl_10", 31 0, L_0000017a04b24258; 1 drivers
v0000017a04b1f220_0 .net *"_ivl_12", 31 0, L_0000017a04b23f60; 1 drivers
v0000017a04b1e460_0 .net *"_ivl_14", 7 0, L_0000017a04b23ce0; 1 drivers
L_0000017a04b242a0 .functor BUFT 1, C4<00000000000000000000000000000011>, C4<0>, C4<0>, C4<0>;
v0000017a04b1e6e0_0 .net/2u *"_ivl_16", 31 0, L_0000017a04b242a0; 1 drivers
v0000017a04b1eaa0_0 .net *"_ivl_18", 31 0, L_0000017a04b23420; 1 drivers
v0000017a04b1e780_0 .net *"_ivl_2", 7 0, L_0000017a04b22520; 1 drivers
L_0000017a04b24210 .functor BUFT 1, C4<00000000000000000000000000000001>, C4<0>, C4<0>, C4<0>;
v0000017a04b1fc20_0 .net/2u *"_ivl_4", 31 0, L_0000017a04b24210; 1 drivers
v0000017a04b1fd60_0 .net *"_ivl_6", 31 0, L_0000017a04b228e0; 1 drivers
v0000017a04b1fe00_0 .net *"_ivl_8", 7 0, L_0000017a04b23c40; 1 drivers
v0000017a04b1ea00_0 .net "instr", 31 0, L_0000017a04a55b30; alias, 1 drivers
v0000017a04b1fea0_0 .net "pc", 31 0, v0000017a04b1fcc0_0; alias, 1 drivers
o0000017a04ac8488 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b1ff40_0 .net "reset", 0 0, o0000017a04ac8488; 0 drivers
v0000017a04b1ffe0 .array "rom", 0 65535, 7 0;
v0000017a04b20080_0 .net "rom_output", 31 0, L_0000017a04b23e20; 1 drivers
L_0000017a04b22c00 .array/port v0000017a04b1ffe0, v0000017a04b1fcc0_0;
L_0000017a04b22520 .array/port v0000017a04b1ffe0, L_0000017a04b228e0;
L_0000017a04b228e0 .arith/sum 32, v0000017a04b1fcc0_0, L_0000017a04b24210;
L_0000017a04b23c40 .array/port v0000017a04b1ffe0, L_0000017a04b23f60;
L_0000017a04b23f60 .arith/sum 32, v0000017a04b1fcc0_0, L_0000017a04b24258;
L_0000017a04b23ce0 .array/port v0000017a04b1ffe0, L_0000017a04b23420;
L_0000017a04b23420 .arith/sum 32, v0000017a04b1fcc0_0, L_0000017a04b242a0;
L_0000017a04b23e20 .concat [ 8 8 8 8], L_0000017a04b23ce0, L_0000017a04b23c40, L_0000017a04b22520, L_0000017a04b22c00;
S_0000017a04a22fd0 .scope module, "se_inst" "SE" 3 117, 12 2 0, S_0000017a04a8deb0;
.timescale -8 -9;
.port_info 0 /INPUT 8 "in";
.port_info 1 /OUTPUT 32 "out";
v0000017a04b1e820_0 .net *"_ivl_1", 0 0, L_0000017a04b82830; 1 drivers
v0000017a04b1e280_0 .net *"_ivl_2", 23 0, L_0000017a04b830f0; 1 drivers
v0000017a04b1ee60_0 .net "in", 7 0, L_0000017a04b81250; 1 drivers
v0000017a04b21910_0 .net "out", 31 0, L_0000017a04b826f0; alias, 1 drivers
L_0000017a04b82830 .part L_0000017a04b81250, 7, 1;
LS_0000017a04b830f0_0_0 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_0_4 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_0_8 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_0_12 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_0_16 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_0_20 .concat [ 1 1 1 1], L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830, L_0000017a04b82830;
LS_0000017a04b830f0_1_0 .concat [ 4 4 4 4], LS_0000017a04b830f0_0_0, LS_0000017a04b830f0_0_4, LS_0000017a04b830f0_0_8, LS_0000017a04b830f0_0_12;
LS_0000017a04b830f0_1_4 .concat [ 4 4 0 0], LS_0000017a04b830f0_0_16, LS_0000017a04b830f0_0_20;
L_0000017a04b830f0 .concat [ 16 8 0 0], LS_0000017a04b830f0_1_0, LS_0000017a04b830f0_1_4;
L_0000017a04b826f0 .concat [ 8 24 0 0], L_0000017a04b81250, L_0000017a04b830f0;
S_0000017a04a8b0e0 .scope module, "data_memory" "data_memory" 13 3;
.timescale -8 -9;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset";
.port_info 2 /INPUT 32 "addr";
.port_info 3 /INPUT 32 "write_data";
.port_info 4 /INPUT 1 "MemRead";
.port_info 5 /INPUT 1 "MemWrite";
.port_info 6 /OUTPUT 32 "read_data";
o0000017a04ac8a88 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b22f20_0 .net "MemRead", 0 0, o0000017a04ac8a88; 0 drivers
o0000017a04ac8ab8 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b231a0_0 .net "MemWrite", 0 0, o0000017a04ac8ab8; 0 drivers
v0000017a04b22840_0 .net *"_ivl_0", 7 0, L_0000017a04b81e30; 1 drivers
v0000017a04b23240_0 .net *"_ivl_10", 31 0, L_0000017a04b81610; 1 drivers
v0000017a04b23740_0 .net *"_ivl_12", 7 0, L_0000017a04b81750; 1 drivers
L_0000017a04b246d8 .functor BUFT 1, C4<00000000000000000000000000000001>, C4<0>, C4<0>, C4<0>;
v0000017a04b227a0_0 .net/2u *"_ivl_14", 31 0, L_0000017a04b246d8; 1 drivers
v0000017a04b23ec0_0 .net *"_ivl_16", 31 0, L_0000017a04b82b50; 1 drivers
v0000017a04b23b00_0 .net *"_ivl_18", 7 0, L_0000017a04b817f0; 1 drivers
L_0000017a04b24648 .functor BUFT 1, C4<00000000000000000000000000000011>, C4<0>, C4<0>, C4<0>;
v0000017a04b23380_0 .net/2u *"_ivl_2", 31 0, L_0000017a04b24648; 1 drivers
v0000017a04b23880_0 .net *"_ivl_20", 31 0, L_0000017a04b82c90; 1 drivers
v0000017a04b232e0_0 .net *"_ivl_24", 31 0, L_0000017a04b81b10; 1 drivers
L_0000017a04b24720 .functor BUFT 1, C4<0000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0000017a04b23600_0 .net *"_ivl_27", 30 0, L_0000017a04b24720; 1 drivers
L_0000017a04b24768 .functor BUFT 1, C4<xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>, C4<0>, C4<0>, C4<0>;
v0000017a04b22480_0 .net *"_ivl_28", 31 0, L_0000017a04b24768; 1 drivers
v0000017a04b223e0_0 .net *"_ivl_4", 31 0, L_0000017a04b81430; 1 drivers
v0000017a04b23920_0 .net *"_ivl_6", 7 0, L_0000017a04b819d0; 1 drivers
L_0000017a04b24690 .functor BUFT 1, C4<00000000000000000000000000000010>, C4<0>, C4<0>, C4<0>;
v0000017a04b237e0_0 .net/2u *"_ivl_8", 31 0, L_0000017a04b24690; 1 drivers
o0000017a04ac8d88 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
v0000017a04b22ca0_0 .net "addr", 31 0, o0000017a04ac8d88; 0 drivers
o0000017a04ac8db8 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b239c0_0 .net "clk", 0 0, o0000017a04ac8db8; 0 drivers
v0000017a04b22b60_0 .var/i "i", 31 0;
v0000017a04b23a60 .array "ram", 0 33, 7 0;
v0000017a04b22660_0 .net "ram_output", 0 0, L_0000017a04b81a70; 1 drivers
v0000017a04b23d80_0 .net "read_data", 31 0, L_0000017a04b81d90; 1 drivers
o0000017a04ac8e78 .functor BUFZ 1, C4<z>; HiZ drive
v0000017a04b236a0_0 .net "reset", 0 0, o0000017a04ac8e78; 0 drivers
o0000017a04ac8ea8 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
v0000017a04b22e80_0 .net "write_data", 31 0, o0000017a04ac8ea8; 0 drivers
E_0000017a04aab9a0 .event posedge, v0000017a04b236a0_0, v0000017a04b239c0_0;
L_0000017a04b81e30 .array/port v0000017a04b23a60, L_0000017a04b81430;
L_0000017a04b81430 .arith/sum 32, o0000017a04ac8d88, L_0000017a04b24648;
L_0000017a04b819d0 .array/port v0000017a04b23a60, L_0000017a04b81610;
L_0000017a04b81610 .arith/sum 32, o0000017a04ac8d88, L_0000017a04b24690;
L_0000017a04b81750 .array/port v0000017a04b23a60, L_0000017a04b82b50;
L_0000017a04b82b50 .arith/sum 32, o0000017a04ac8d88, L_0000017a04b246d8;
L_0000017a04b817f0 .array/port v0000017a04b23a60, o0000017a04ac8d88;
L_0000017a04b82c90 .concat [ 8 8 8 8], L_0000017a04b817f0, L_0000017a04b81750, L_0000017a04b819d0, L_0000017a04b81e30;
L_0000017a04b81a70 .part L_0000017a04b82c90, 0, 1;
L_0000017a04b81b10 .concat [ 1 31 0 0], L_0000017a04b81a70, L_0000017a04b24720;
L_0000017a04b81d90 .functor MUXZ 32, L_0000017a04b24768, L_0000017a04b81b10, o0000017a04ac8a88, C4<>;
.scope S_0000017a04a4f140;
T_0 ;
%wait E_0000017a04aabe60;
%load/vec4 v0000017a04b1f7c0_0;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 0, 0, 32;
%assign/vec4 v0000017a04b1fcc0_0, 0;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v0000017a04b1f540_0;
%assign/vec4 v0000017a04b1fcc0_0, 0;
T_0.1 ;
%jmp T_0;
.thread T_0;
.scope S_0000017a04a22e40;
T_1 ;
%pushi/vec4 0, 0, 8;
%ix/load 4, 0, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 1, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 2, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 3, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 4, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 5, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 6, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 7, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 8, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 9, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 10, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 11, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 12, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 13, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 14, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 15, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 16, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 17, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 18, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 19, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 20, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 21, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 22, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 23, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 24, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 25, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 26, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 27, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 28, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 29, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 30, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%pushi/vec4 0, 0, 8;
%ix/load 4, 31, 0;
%flag_set/imm 4, 0;
%store/vec4a v0000017a04b1ffe0, 4, 0;
%vpi_call 11 27 "$readmemb", "TEST_INSTRUCTIONS.dat", v0000017a04b1ffe0 {0 0 0};
%end;
.thread T_1;
.scope S_0000017a04a2b9a0;
T_2 ;
%wait E_0000017a04aab8a0;
%load/vec4 v0000017a04b1e960_0;
%dup/vec4;
%pushi/vec4 51, 0, 7;
%cmp/u;
%jmp/1 T_2.0, 6;
%dup/vec4;
%pushi/vec4 3, 0, 7;
%cmp/u;
%jmp/1 T_2.1, 6;
%dup/vec4;
%pushi/vec4 35, 0, 7;
%cmp/u;
%jmp/1 T_2.2, 6;
%dup/vec4;
%pushi/vec4 99, 0, 7;
%cmp/u;
%jmp/1 T_2.3, 6;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1f360_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fa40_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fae0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f860_0, 0, 1;
%pushi/vec4 2, 0, 2;
%store/vec4 v0000017a04b1f9a0_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f400_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e8c0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e1e0_0, 0, 1;
%jmp T_2.5;
T_2.0 ;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1f360_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fa40_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1fae0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f860_0, 0, 1;
%pushi/vec4 2, 0, 2;
%store/vec4 v0000017a04b1f9a0_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f400_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e8c0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e1e0_0, 0, 1;
%jmp T_2.5;
T_2.1 ;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1f360_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fa40_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fae0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1f860_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1f9a0_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1f400_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e8c0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e1e0_0, 0, 1;
%jmp T_2.5;
T_2.2 ;
%pushi/vec4 1, 0, 2;
%store/vec4 v0000017a04b1f360_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1fa40_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1fae0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1f860_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1f9a0_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f400_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1e8c0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e1e0_0, 0, 1;
%jmp T_2.5;
T_2.3 ;
%pushi/vec4 2, 0, 2;
%store/vec4 v0000017a04b1f360_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1fa40_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1fae0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f860_0, 0, 1;
%pushi/vec4 1, 0, 2;
%store/vec4 v0000017a04b1f9a0_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1f400_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1e8c0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000017a04b1e1e0_0, 0, 1;
%jmp T_2.5;
T_2.5 ;
%pop/vec4 1;
%jmp T_2;
.thread T_2, $push;
.scope S_0000017a04a4f2d0;
T_3 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v0000017a04b1e640_0, 0, 32;
T_3.0 ;
%load/vec4 v0000017a04b1e640_0;
%cmpi/s 32, 0, 32;
%jmp/0xz T_3.1, 5;
%load/vec4 v0000017a04b1e640_0;
%ix/getv/s 4, v0000017a04b1e640_0;
%store/vec4a v0000017a04b1ef00, 4, 0;
%load/vec4 v0000017a04b1e640_0;
%addi 1, 0, 32;
%store/vec4 v0000017a04b1e640_0, 0, 32;
%jmp T_3.0;
T_3.1 ;
%end;
.thread T_3;
.scope S_0000017a04a4f2d0;
T_4 ;
%wait E_0000017a04aab920;
%load/vec4 v0000017a04b1e3c0_0;
%flag_set/vec4 8;
%jmp/0xz T_4.0, 8;
%load/vec4 v0000017a04b1ebe0_0;
%load/vec4 v0000017a04b1f720_0;
%pad/u 7;
%ix/vec4 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0000017a04b1ef00, 0, 4;
T_4.0 ;
%jmp T_4;
.thread T_4;
.scope S_0000017a04a42ed0;
T_5 ;
%wait E_0000017a04aab760;
%load/vec4 v0000017a04a81f70_0;
%dup/vec4;
%pushi/vec4 0, 0, 2;
%cmp/u;
%jmp/1 T_5.0, 6;
%dup/vec4;
%pushi/vec4 1, 0, 2;
%cmp/u;
%jmp/1 T_5.1, 6;
%dup/vec4;
%pushi/vec4 2, 0, 2;
%cmp/u;
%jmp/1 T_5.2, 6;
%pushi/vec4 15, 15, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.4;
T_5.0 ;
%pushi/vec4 2, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.4;
T_5.1 ;
%pushi/vec4 6, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.4;
T_5.2 ;
%load/vec4 v0000017a04a80850_0;
%pad/u 4;
%dup/vec4;
%pushi/vec4 0, 0, 4;
%cmp/u;
%jmp/1 T_5.5, 6;
%dup/vec4;
%pushi/vec4 8, 0, 4;
%cmp/u;
%jmp/1 T_5.6, 6;
%dup/vec4;
%pushi/vec4 7, 0, 4;
%cmp/u;
%jmp/1 T_5.7, 6;
%dup/vec4;
%pushi/vec4 6, 0, 4;
%cmp/u;
%jmp/1 T_5.8, 6;
%pushi/vec4 2, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.10;
T_5.5 ;
%pushi/vec4 2, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.10;
T_5.6 ;
%pushi/vec4 6, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.10;
T_5.7 ;
%pushi/vec4 0, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.10;
T_5.8 ;
%pushi/vec4 1, 0, 4;
%store/vec4 v0000017a04a81070_0, 0, 4;
%jmp T_5.10;
T_5.10 ;
%pop/vec4 1;
%jmp T_5.4;
T_5.4 ;
%pop/vec4 1;
%jmp T_5;
.thread T_5, $push;
.scope S_0000017a04a98440;
T_6 ;
%wait E_0000017a04aabda0;
%load/vec4 v0000017a04a80210_0;
%dup/vec4;
%pushi/vec4 0, 0, 4;
%cmp/u;
%jmp/1 T_6.0, 6;
%dup/vec4;
%pushi/vec4 1, 0, 4;
%cmp/u;
%jmp/1 T_6.1, 6;
%dup/vec4;
%pushi/vec4 2, 0, 4;
%cmp/u;
%jmp/1 T_6.2, 6;
%dup/vec4;
%pushi/vec4 2, 0, 4;
%cmp/u;
%jmp/1 T_6.3, 6;
%dup/vec4;
%pushi/vec4 8, 0, 4;
%cmp/u;
%jmp/1 T_6.4, 6;
%pushi/vec4 4294967295, 4294967295, 32;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.0 ;
%load/vec4 v0000017a04a81ed0_0;
%load/vec4 v0000017a04a816b0_0;
%and;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.1 ;
%load/vec4 v0000017a04a81ed0_0;
%load/vec4 v0000017a04a816b0_0;
%or;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.2 ;
%load/vec4 v0000017a04a81ed0_0;
%load/vec4 v0000017a04a816b0_0;
%add;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.3 ;
%load/vec4 v0000017a04a81ed0_0;
%load/vec4 v0000017a04a816b0_0;
%sub;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.4 ;
%load/vec4 v0000017a04a81ed0_0;
%load/vec4 v0000017a04a816b0_0;
%cmp/u;
%flag_mov 8, 5;
%jmp/0 T_6.7, 8;
%pushi/vec4 1, 0, 32;
%jmp/1 T_6.8, 8;
T_6.7 ; End of true expr.
%pushi/vec4 0, 0, 32;
%jmp/0 T_6.8, 8;
; End of false expr.
%blend;
T_6.8;
%store/vec4 v0000017a04a80fd0_0, 0, 32;
%jmp T_6.6;
T_6.6 ;
%pop/vec4 1;
%jmp T_6;
.thread T_6, $push;
.scope S_0000017a04a3dc90;
T_7 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1b700_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1ab20_0, 0, 2;
%pushi/vec4 0, 0, 4;
%store/vec4 v0000017a04b1c770_0, 0, 4;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1b340_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v0000017a04b1a620_0, 0, 2;
%pushi/vec4 0, 0, 4;
%store/vec4 v0000017a04b1d5d0_0, 0, 4;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1c060_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000017a04b1b160_0, 0, 1;
%end;
.thread T_7;
.scope S_0000017a04a3dc90;
T_8 ;
%fork t_1, S_0000017a04a32360;
%jmp t_0;