@@ -28,9 +28,6 @@ int16_t3 test_clamp_short3(int16_t3 p0, int16_t3 p1) { return clamp(p0, p1,p1);
2828// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z17test_clamp_short4
2929// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i16
3030int16_t4 test_clamp_short4 (int16_t4 p0, int16_t4 p1) { return clamp (p0, p1,p1); }
31- // NATIVE_HALF: define [[FNATTRS]] <4 x i16> {{.*}}test_clamp_short4_mismatch
32- // NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i16
33- int16_t4 test_clamp_short4_mismatch (int16_t4 p0, int16_t p1) { return clamp (p0, p0,p1); }
3431
3532// NATIVE_HALF: define [[FNATTRS]] i16 @_Z17test_clamp_ushort
3633// NATIVE_HALF: call i16 @llvm.[[TARGET]].uclamp.i16(
@@ -44,9 +41,6 @@ uint16_t3 test_clamp_ushort3(uint16_t3 p0, uint16_t3 p1) { return clamp(p0, p1,p
4441// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z18test_clamp_ushort4
4542// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i16
4643uint16_t4 test_clamp_ushort4 (uint16_t4 p0, uint16_t4 p1) { return clamp (p0, p1,p1); }
47- // NATIVE_HALF: define [[FNATTRS]] <4 x i16> {{.*}}test_clamp_ushort4_mismatch
48- // NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i16
49- uint16_t4 test_clamp_ushort4_mismatch (uint16_t4 p0, uint16_t p1) { return clamp (p0, p0,p1); }
5044#endif
5145
5246// CHECK: define [[FNATTRS]] i32 @_Z14test_clamp_int
@@ -61,9 +55,6 @@ int3 test_clamp_int3(int3 p0, int3 p1) { return clamp(p0, p1,p1); }
6155// CHECK: define [[FNATTRS]] <4 x i32> @_Z15test_clamp_int4
6256// CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i32
6357int4 test_clamp_int4 (int4 p0, int4 p1) { return clamp (p0, p1,p1); }
64- // CHECK: define [[FNATTRS]] <4 x i32> {{.*}}test_clamp_int4_mismatch
65- // CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i32
66- int4 test_clamp_int4_mismatch (int4 p0, int p1) { return clamp (p0, p0,p1); }
6758
6859// CHECK: define [[FNATTRS]] i32 @_Z15test_clamp_uint
6960// CHECK: call i32 @llvm.[[TARGET]].uclamp.i32(
@@ -77,9 +68,6 @@ uint3 test_clamp_uint3(uint3 p0, uint3 p1) { return clamp(p0, p1,p1); }
7768// CHECK: define [[FNATTRS]] <4 x i32> @_Z16test_clamp_uint4
7869// CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i32
7970uint4 test_clamp_uint4 (uint4 p0, uint4 p1) { return clamp (p0, p1,p1); }
80- // CHECK: define [[FNATTRS]] <4 x i32> {{.*}}test_clamp_uint4_mismatch
81- // CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i32
82- uint4 test_clamp_uint4_mismatch (uint4 p0, uint p1) { return clamp (p0, p0,p1); }
8371
8472// CHECK: define [[FNATTRS]] i64 @_Z15test_clamp_long
8573// CHECK: call i64 @llvm.[[TARGET]].sclamp.i64(
@@ -93,9 +81,6 @@ int64_t3 test_clamp_long3(int64_t3 p0, int64_t3 p1) { return clamp(p0, p1,p1); }
9381// CHECK: define [[FNATTRS]] <4 x i64> @_Z16test_clamp_long4
9482// CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i64
9583int64_t4 test_clamp_long4 (int64_t4 p0, int64_t4 p1) { return clamp (p0, p1,p1); }
96- // CHECK: define [[FNATTRS]] <4 x i64> {{.*}}test_clamp_long4_mismatch
97- // CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i64
98- int64_t4 test_clamp_long4_mismatch (int64_t4 p0, int64_t p1) { return clamp (p0, p0,p1); }
9984
10085// CHECK: define [[FNATTRS]] i64 @_Z16test_clamp_ulong
10186// CHECK: call i64 @llvm.[[TARGET]].uclamp.i64(
@@ -109,9 +94,6 @@ uint64_t3 test_clamp_ulong3(uint64_t3 p0, uint64_t3 p1) { return clamp(p0, p1,p1
10994// CHECK: define [[FNATTRS]] <4 x i64> @_Z17test_clamp_ulong4
11095// CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i64
11196uint64_t4 test_clamp_ulong4 (uint64_t4 p0, uint64_t4 p1) { return clamp (p0, p1,p1); }
112- // CHECK: define [[FNATTRS]] <4 x i64> {{.*}}test_clamp_ulong4_mismatch
113- // CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i64
114- uint64_t4 test_clamp_ulong4_mismatch (uint64_t4 p0, uint64_t p1) { return clamp (p0, p0,p1); }
11597
11698// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] half @_Z15test_clamp_half
11799// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].nclamp.f16(
@@ -133,11 +115,6 @@ half3 test_clamp_half3(half3 p0, half3 p1) { return clamp(p0, p1,p1); }
133115// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z16test_clamp_half4
134116// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32(
135117half4 test_clamp_half4 (half4 p0, half4 p1) { return clamp (p0, p1,p1); }
136- // NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x half> {{.*}}test_clamp_half4_mismatch
137- // NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].nclamp.v4f16
138- // NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x float> {{.*}}test_clamp_half4_mismatch
139- // NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32(
140- half4 test_clamp_half4_mismatch (half4 p0, half p1) { return clamp (p0, p0,p1); }
141118
142119// CHECK: define [[FNATTRS]] [[FFNATTRS]] float @_Z16test_clamp_float
143120// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].nclamp.f32(
@@ -151,9 +128,6 @@ float3 test_clamp_float3(float3 p0, float3 p1) { return clamp(p0, p1,p1); }
151128// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z17test_clamp_float4
152129// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32
153130float4 test_clamp_float4 (float4 p0, float4 p1) { return clamp (p0, p1,p1); }
154- // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x float> {{.*}}test_clamp_float4_mismatch
155- // CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32
156- float4 test_clamp_float4_mismatch (float4 p0, float p1) { return clamp (p0, p0,p1); }
157131
158132// CHECK: define [[FNATTRS]] [[FFNATTRS]] double @_Z17test_clamp_double
159133// CHECK: call reassoc nnan ninf nsz arcp afn double @llvm.[[TARGET]].nclamp.f64(
@@ -167,13 +141,3 @@ double3 test_clamp_double3(double3 p0, double3 p1) { return clamp(p0, p1,p1); }
167141// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> @_Z18test_clamp_double4
168142// CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
169143double4 test_clamp_double4 (double4 p0, double4 p1) { return clamp (p0, p1,p1); }
170- // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> {{.*}}test_clamp_double4_mismatch
171- // CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
172- double4 test_clamp_double4_mismatch (double4 p0, double p1) { return clamp (p0, p0,p1); }
173- // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> {{.*}}test_clamp_double4_mismatch2
174- // CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
175- double4 test_clamp_double4_mismatch2 (double4 p0, double p1) { return clamp (p0, p1,p0); }
176-
177- // CHECK: define [[FNATTRS]] <3 x i32> {{.*}}test_overloads3
178- // CHECK: call <3 x i32> @llvm.[[TARGET]].uclamp.v3i32
179- uint3 test_overloads3 (uint3 p0, uint p1, uint p2) { return clamp (p0, p1, p2); }
0 commit comments