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jyli0116IanWood1
jyli0116
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IanWood1
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[AArch64] Add FEAT_FPAC to supported CPUs (llvm#137330)
Added FEAT_FPAC onto supported AArch64 CPUs which don't have it under the processor description.
1 parent b936b9b commit 787c913

22 files changed

+40
-21
lines changed

‎clang/test/CodeGen/AArch64/targetattr.c‎

Lines changed: 1 addition & 1 deletion
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@@ -204,7 +204,7 @@ void applem4() {}
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// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" }
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// CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a" }
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// CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+predres,+ras,+rcpc,+rdm,+sb,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" }
207-
// CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a710" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a" }
207+
// CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a710" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a" }
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// CHECK: attributes #[[ATTR5]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "tune-cpu"="cortex-a710" }
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// CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+ete,+fp-armv8,+neon,+trbe,+v8a" }
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// CHECK: attributes #[[ATTR7]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "tune-cpu"="generic" }

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a510.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
23+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a710.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2121
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2222
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
23+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2324
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2425
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a715.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2121
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2222
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
23+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2324
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2425
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720ae.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-a725.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
2424
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
2525
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
26+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
2627
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
2728
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons

‎clang/test/Driver/print-enabled-extensions/aarch64-cortex-r82.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
18+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
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// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension

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