@@ -8460,33 +8460,6 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
84608460 if (isa<ConstantSDNode>(TrueV) && isa<ConstantSDNode>(FalseV)) {
84618461 const APInt &TrueVal = TrueV->getAsAPIntVal();
84628462 const APInt &FalseVal = FalseV->getAsAPIntVal();
8463-
8464- // Prefer these over Zicond to avoid materializing an immediate:
8465- // (select (x < 0), y, z) -> x >> (XLEN - 1) & (y - z) + z
8466- // (select (x > -1), z, y) -> x >> (XLEN - 1) & (y - z) + z
8467- if (CondV.getOpcode() == ISD::SETCC &&
8468- CondV.getOperand(0).getValueType() == VT && CondV.hasOneUse()) {
8469- ISD::CondCode CCVal = cast<CondCodeSDNode>(CondV.getOperand(2))->get();
8470- if ((CCVal == ISD::SETLT && isNullConstant(CondV.getOperand(1))) ||
8471- (CCVal == ISD::SETGT && isAllOnesConstant(CondV.getOperand(1)))) {
8472- int64_t TrueImm = TrueVal.getSExtValue();
8473- int64_t FalseImm = FalseVal.getSExtValue();
8474- if (CCVal == ISD::SETGT)
8475- std::swap(TrueImm, FalseImm);
8476- if (isInt<12>(TrueImm) && isInt<12>(FalseImm) &&
8477- isInt<12>(TrueImm - FalseImm)) {
8478- SDValue SRA =
8479- DAG.getNode(ISD::SRA, DL, VT, CondV.getOperand(0),
8480- DAG.getConstant(Subtarget.getXLen() - 1, DL, VT));
8481- SDValue AND =
8482- DAG.getNode(ISD::AND, DL, VT, SRA,
8483- DAG.getSignedConstant(TrueImm - FalseImm, DL, VT));
8484- return DAG.getNode(ISD::ADD, DL, VT, AND,
8485- DAG.getSignedConstant(FalseImm, DL, VT));
8486- }
8487- }
8488- }
8489-
84908463 const int TrueValCost = RISCVMatInt::getIntMatCost(
84918464 TrueVal, Subtarget.getXLen(), Subtarget, /*CompressionCost=*/true);
84928465 const int FalseValCost = RISCVMatInt::getIntMatCost(
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