@@ -719,8 +719,8 @@ subroutine vec_xlds_testi64a(arg1, arg2, res)
719719! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
720720! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
721721! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
722- ! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef , i64 %[[ld]], i32 0
723- ! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef , <2 x i32> zeroinitializer
722+ ! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison , i64 %[[ld]], i32 0
723+ ! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison , <2 x i32> zeroinitializer
724724! LLVMIR: store <2 x i64> %[[shflv]], ptr %2, align 16
725725end subroutine vec_xlds_testi64a
726726
@@ -734,8 +734,8 @@ subroutine vec_xlds_testf64a(arg1, arg2, res)
734734! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
735735! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
736736! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
737- ! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef , i64 %[[ld]], i32 0
738- ! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef , <2 x i32> zeroinitializer
737+ ! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison , i64 %[[ld]], i32 0
738+ ! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison , <2 x i32> zeroinitializer
739739! LLVMIR: %[[bc:.*]] = bitcast <2 x i64> %[[shflv]] to <2 x double>
740740! LLVMIR: store <2 x double> %[[bc]], ptr %2, align 16
741741end subroutine vec_xlds_testf64a
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