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Merge branch 'feature/advanced-indexing' into take-put-impl
2 parents 81ba473 + 8523d8e commit 1f61206

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+603
-130
lines changed

README.md

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@@ -3,7 +3,7 @@
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[![pre-commit](https://img.shields.io/badge/pre--commit-enabled-brightgreen?logo=pre-commit&logoColor=white)](https://github.com/pre-commit/pre-commit)
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[![Coverage Status](https://coveralls.io/repos/github/IntelPython/dpctl/badge.svg?branch=master)](https://coveralls.io/github/IntelPython/dpctl?branch=master)
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![Generate Documentation](https://github.com/IntelPython/dpctl/actions/workflows/generate-docs.yml/badge.svg?branch=master)
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[![Join the chat at https://matrix.to/#/#Data-Parallel-Python_community:gitter.im](https://badges.gitter.im/Join%20Chat.svg)](https://app.gitter.im/#/room/#Data-Parallel-Python_community:gitter.im)
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<img align="left" src="https://spec.oneapi.io/oneapi-logo-white-scaled.jpg" alt="oneAPI logo" width="75"/>
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conda-recipe/bld.bat

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@@ -6,7 +6,7 @@ set "INCLUDE=%BUILD_PREFIX%\include;%INCLUDE%"
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"%PYTHON%" setup.py clean --all
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set "SKBUILD_ARGS=-G Ninja -- -DCMAKE_C_COMPILER:PATH=icx -DCMAKE_CXX_COMPILER:PATH=icx"
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FOR %%V IN (14.0.0 15.0.0 16.0.0) DO @(
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FOR %%V IN (14.0.0 14 15.0.0 15 16.0.0 16) DO @(
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REM set DIR_HINT if directory exists
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IF EXIST "%BUILD_PREFIX%\Library\lib\clang\%%V\" (
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SET "SYCL_INCLUDE_DIR_HINT=%BUILD_PREFIX%\Library\lib\clang\%%V"
@@ -18,11 +18,13 @@ set "FN=Windows-IntelLLVM.cmake"
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rem Save the original file, and copy patched file to
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rem fix the issue with IntelLLVM integration with cmake on Windows
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dir "%PLATFORM_DIR%\%FN%"
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copy /Y "%PLATFORM_DIR%\%FN%" .
23-
if errorlevel 1 exit 1
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copy /Y .github\workflows\Windows-IntelLLVM.cmake "%PLATFORM_DIR%"
25-
if errorlevel 1 exit 1
21+
if EXIST "%PLATFORM_DIR%" (
22+
dir "%PLATFORM_DIR%\%FN%"
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copy /Y "%PLATFORM_DIR%\%FN%" .
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if errorlevel 1 exit 1
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copy /Y .github\workflows\Windows-IntelLLVM.cmake "%PLATFORM_DIR%"
26+
if errorlevel 1 exit 1
27+
)
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if NOT "%WHEELS_OUTPUT_FOLDER%"=="" (
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rem Install and assemble wheel package from the build bits

conda-recipe/build.sh

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@@ -30,3 +30,10 @@ else
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# Perform regular install
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${PYTHON} setup.py install ${SKBUILD_ARGS}
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fi
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# need to create this folder so ensure that .dpctl-post-link.sh can work correctly
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mkdir -p $PREFIX/etc/OpenCL/vendors
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echo "dpctl creates symbolic link to system installed /etc/OpenCL/vendors/intel.icd as a work-around." > $PREFIX/etc/OpenCL/vendors/.dpctl_readme
37+
38+
cp $RECIPE_DIR/dpctl-post-link.sh $PREFIX/bin/.dpctl-post-link.sh
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cp $RECIPE_DIR/dpctl-pre-unlink.sh $PREFIX/bin/.dpctl-pre-unlink.sh

conda-recipe/dpctl-post-link.sh

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@@ -0,0 +1,9 @@
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#!/usr/bin/bash
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systemwide_icd=/etc/OpenCL/vendors/intel.icd
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local_vendors=$PREFIX/etc/OpenCL/vendors/
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icd_fn=$local_vendors/intel-ocl-gpu.icd
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7+
if [[ -f $systemwide_icd && -d $local_vendors && ! -f $icd_fn ]]; then
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ln -s $systemwide_icd $icd_fn
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fi

conda-recipe/dpctl-pre-unlink.sh

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#!/usr/bin/bash
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local_vendors=$PREFIX/etc/OpenCL/vendors/
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icd_fn=$local_vendors/intel-ocl-gpu.icd
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if [[ -L $icd_fn ]]; then
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rm $icd_fn
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fi

conda-recipe/meta.yaml

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@@ -12,9 +12,8 @@ build:
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requirements:
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build:
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- {{ compiler('c') }}
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- {{ compiler('cxx') }}
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- {{ compiler('dpcpp') }} >=2022.1 # [not osx]
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- {{ compiler('dpcpp') }} >=2023.0 # [not osx]
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host:
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- setuptools
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- cmake >=3.21

dpctl/CMakeLists.txt

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@@ -23,7 +23,7 @@ if(WIN32)
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set(CMAKE_CXX_FLAGS_DEBUG
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"${CMAKE_CXX_FLAGS_DEBUG} ${WARNING_FLAGS} -O0 -g1 -DDEBUG"
2525
)
26-
set(DPCTL_LDFLAGS "/link /NXCompat /DynamicBase")
26+
set(DPCTL_LDFLAGS "/NXCompat;/DynamicBase")
2727
elseif(UNIX)
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string(CONCAT WARNING_FLAGS
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"-Wall "
@@ -140,7 +140,8 @@ function(build_dpctl_ext _trgt _src _dest)
140140
target_compile_options(${_trgt} PRIVATE -fno-sycl-use-footer)
141141
endif()
142142
target_link_libraries(${_trgt} DPCTLSyclInterface)
143-
target_link_options(${_trgt} PRIVATE "LINKER:${DPCTL_LDFLAGS}")
143+
set(_linker_options "LINKER:${DPCTL_LDFLAGS}")
144+
target_link_options(${_trgt} PRIVATE ${_linker_options})
144145
python_extension_module(${_trgt})
145146
get_filename_component(_name_wle ${_generated_src} NAME_WLE)
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get_filename_component(_generated_src_dir ${_generated_src} DIRECTORY)

dpctl/_backend.pxd

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Original file line numberDiff line numberDiff line change
@@ -186,7 +186,14 @@ cdef extern from "syclinterface/dpctl_sycl_device_interface.h":
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cdef uint32_t DPCTLDevice_GetPreferredVectorWidthFloat(const DPCTLSyclDeviceRef DRef)
187187
cdef uint32_t DPCTLDevice_GetPreferredVectorWidthDouble(const DPCTLSyclDeviceRef DRef)
188188
cdef uint32_t DPCTLDevice_GetPreferredVectorWidthHalf(const DPCTLSyclDeviceRef DRef)
189-
cpdef bool DPCTLDevice_HasAspect(const DPCTLSyclDeviceRef, _aspect_type)
189+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthChar(const DPCTLSyclDeviceRef DRef)
190+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthShort(const DPCTLSyclDeviceRef DRef)
191+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthInt(const DPCTLSyclDeviceRef DRef)
192+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthLong(const DPCTLSyclDeviceRef DRef)
193+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthFloat(const DPCTLSyclDeviceRef DRef)
194+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthDouble(const DPCTLSyclDeviceRef DRef)
195+
cdef uint32_t DPCTLDevice_GetNativeVectorWidthHalf(const DPCTLSyclDeviceRef DRef)
196+
cdef bool DPCTLDevice_HasAspect(const DPCTLSyclDeviceRef, _aspect_type)
190197
cdef uint32_t DPCTLDevice_GetMaxReadImageArgs(const DPCTLSyclDeviceRef DRef)
191198
cdef uint32_t DPCTLDevice_GetMaxWriteImageArgs(const DPCTLSyclDeviceRef DRef)
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cdef size_t DPCTLDevice_GetImage2dMaxWidth(const DPCTLSyclDeviceRef DRef)

dpctl/_sycl_device.pyx

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@@ -54,6 +54,13 @@ from ._backend cimport ( # noqa: E211
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DPCTLDevice_GetMaxWorkItemSizes3d,
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DPCTLDevice_GetMaxWriteImageArgs,
5656
DPCTLDevice_GetName,
57+
DPCTLDevice_GetNativeVectorWidthChar,
58+
DPCTLDevice_GetNativeVectorWidthDouble,
59+
DPCTLDevice_GetNativeVectorWidthFloat,
60+
DPCTLDevice_GetNativeVectorWidthHalf,
61+
DPCTLDevice_GetNativeVectorWidthInt,
62+
DPCTLDevice_GetNativeVectorWidthLong,
63+
DPCTLDevice_GetNativeVectorWidthShort,
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DPCTLDevice_GetParentDevice,
5865
DPCTLDevice_GetPartitionMaxSubDevices,
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DPCTLDevice_GetPlatform,
@@ -942,6 +949,55 @@ cdef class SyclDevice(_SyclDevice):
942949
"""
943950
return DPCTLDevice_GetPreferredVectorWidthHalf(self._device_ref)
944951

952+
@property
953+
def native_vector_width_char(self):
954+
""" Returns the native ISA vector width size for built-in scalar
955+
types that can be put into vectors.
956+
"""
957+
return DPCTLDevice_GetNativeVectorWidthChar(self._device_ref)
958+
959+
@property
960+
def native_vector_width_short(self):
961+
""" Returns the native ISA vector width size for built-in scalar
962+
types that can be put into vectors.
963+
"""
964+
return DPCTLDevice_GetNativeVectorWidthShort(self._device_ref)
965+
966+
@property
967+
def native_vector_width_int(self):
968+
""" Returns the native ISA vector width size for built-in scalar
969+
types that can be put into vectors.
970+
"""
971+
return DPCTLDevice_GetNativeVectorWidthInt(self._device_ref)
972+
973+
@property
974+
def native_vector_width_long(self):
975+
""" Returns the native ISA vector width size for built-in scalar
976+
types that can be put into vectors.
977+
"""
978+
return DPCTLDevice_GetNativeVectorWidthLong(self._device_ref)
979+
980+
@property
981+
def native_vector_width_float(self):
982+
""" Returns the native ISA vector width size for built-in scalar
983+
types that can be put into vectors.
984+
"""
985+
return DPCTLDevice_GetNativeVectorWidthFloat(self._device_ref)
986+
987+
@property
988+
def native_vector_width_double(self):
989+
""" Returns the native ISA vector width size for built-in scalar
990+
types that can be put into vectors.
991+
"""
992+
return DPCTLDevice_GetNativeVectorWidthDouble(self._device_ref)
993+
994+
@property
995+
def native_vector_width_half(self):
996+
""" Returns the native ISA vector width size for built-in scalar
997+
types that can be put into vectors.
998+
"""
999+
return DPCTLDevice_GetNativeVectorWidthHalf(self._device_ref)
1000+
9451001
@property
9461002
def global_mem_size(self):
9471003
""" Returns the size of global memory on this device in bytes.

dpctl/_sycl_queue_manager.pxd

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@@ -17,9 +17,12 @@
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# distutils: language = c++
1818
# cython: language_level=3
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20+
from ._sycl_device cimport SyclDevice
2021
from ._sycl_queue cimport SyclQueue
2122

2223

2324
cpdef SyclQueue get_current_queue()
2425
cpdef get_current_device_type ()
2526
cpdef get_current_backend()
27+
28+
cpdef object get_device_cached_queue(object)

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