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2 | 2 | [](https://pycqa.github.io/isort/)
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3 | 3 | [](https://coveralls.io/github/IntelPython/dpctl?branch=master)
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4 | 4 |
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5 |
| -What? |
6 |
| -==== |
| 5 | +About dpctl |
| 6 | +=========== |
| 7 | + |
7 | 8 | <img align="left" src="https://spec.oneapi.io/oneapi-logo-white-scaled.jpg" alt="oneAPI logo" />
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8 | 9 |
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9 |
| -A lightweight Python package exposing a subset of SYCL functionalities, part of Intel(R) [oneAPI](https://oneapi.io) [Base ToolKit](https://software.intel.com/content/www/us/en/develop/tools/oneapi/base-toolkit.html). |
| 10 | +`dpctl` (data parallel control) is a lightweight [Python package](https://intelpython.github.io/dpctl) exposing a |
| 11 | +subset of the Intel(R) oneAPI DPC++ [runtime classes](https://www.khronos.org/registry/SYCL/specs/sycl-2020/html/sycl-2020.html#_sycl_runtime_classes) |
| 12 | +that is distributed as part of [Intel(R) Distribution for Python*](https://software.intel.com/content/www/us/en/develop/tools/oneapi/components/distribution-for-python.html) and |
| 13 | +is included in Intel(R) [oneAPI](https://oneapi.io) [Base ToolKit](https://software.intel.com/content/www/us/en/develop/tools/oneapi/base-toolkit.html). |
| 14 | +`dpctl` lets Python users query SYCL platforms, discover and represent SYCL devices, and construct SYCL queues to control data-parallel code execution on [Intel(R) XPUs](https://www.intel.com/content/www/us/en/newsroom/news/xpu-vision-oneapi-server-gpu.html) from Python. |
| 15 | + |
| 16 | +`dpctl` features classes representing [SYCL unified shared memory](https://www.khronos.org/registry/SYCL/specs/sycl-2020/html/sycl-2020.html#sec:usm) |
| 17 | +allocations as well as higher-level objects such as [`dpctl.tensor.usm_ndarray`](https://intelpython.github.io/dpctl/latest/docfiles/dpctl.tensor_api.html#module-dpctl.tensor) on top of USM allocations. |
| 18 | + |
| 19 | +`dpctl` assists authors of Python native extensions written in C, |
| 20 | +Cython, or pybind11 to use its `dpctl.SyclQueue` object to indicate the offload |
| 21 | +target as well as objects in `dpctl.memory` and `dpctl.tensor` submodules to |
| 22 | +represent USM allocations that are accessible from within data-parallel code executed |
| 23 | +on the target queue. |
10 | 24 |
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11 |
| -`dpctl` [provides](https://intelpython.github.io/dpctl) for discovery and selection of SYCL devices, construction of SYCL queues, as well as working with USM allocations. |
12 |
| -<br /><br /> |
| 25 | +`dpctl.tensor` submodule provides an array container representing an array in a |
| 26 | +strided layout on top of a USM allocation. The submodule provides an array-API |
| 27 | +conforming oneAPI DPC++ powered library to manipulate the array container. |
13 | 28 |
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14 | 29 | Requirements
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15 | 30 | ============
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