Docs for pull request 2096

Author: github-actions[doc-deploy-bot]

pulls/2096/_modules/dpctl/tensor/_ctors.html

@@ -904,8 +904,6 @@ <h1>Source code for dpctl.tensor._ctors</h1><div class="highlight"><pre>
         <span class="k">raise</span> <span class="ne">TypeError</span><span class="p">(</span>
             <span class="sa">f</span><span class="s2">&quot;Expected dpctl.tensor.usm_ndarray, got </span><span class="si">{</span><span class="nb">type</span><span class="p">(</span><span class="n">usm_ndary</span><span class="p">)</span><span class="si">}</span><span class="s2">&quot;</span>
         <span class="p">)</span>
-    <span class="k">if</span> <span class="n">dtype</span> <span class="ow">is</span> <span class="kc">None</span><span class="p">:</span>
-        <span class="n">dtype</span> <span class="o">=</span> <span class="n">usm_ndary</span><span class="o">.</span><span class="n">dtype</span>
     <span class="k">if</span> <span class="n">usm_type</span> <span class="ow">is</span> <span class="kc">None</span><span class="p">:</span>
         <span class="n">usm_type</span> <span class="o">=</span> <span class="n">usm_ndary</span><span class="o">.</span><span class="n">usm_type</span>
     <span class="k">if</span> <span class="n">sycl_queue</span> <span class="ow">is</span> <span class="ow">not</span> <span class="kc">None</span><span class="p">:</span>
@@ -915,6 +913,8 @@ <h1>Source code for dpctl.tensor._ctors</h1><div class="highlight"><pre>
         <span class="n">copy_q</span> <span class="o">=</span> <span class="n">normalize_queue_device</span><span class="p">(</span><span class="n">sycl_queue</span><span class="o">=</span><span class="n">sycl_queue</span><span class="p">,</span> <span class="n">device</span><span class="o">=</span><span class="n">exec_q</span><span class="p">)</span>
     <span class="k">else</span><span class="p">:</span>
         <span class="n">copy_q</span> <span class="o">=</span> <span class="n">usm_ndary</span><span class="o">.</span><span class="n">sycl_queue</span>
+    <span class="k">if</span> <span class="n">dtype</span> <span class="ow">is</span> <span class="kc">None</span><span class="p">:</span>
+        <span class="n">dtype</span> <span class="o">=</span> <span class="n">_map_to_device_dtype</span><span class="p">(</span><span class="n">usm_ndary</span><span class="o">.</span><span class="n">dtype</span><span class="p">,</span> <span class="n">copy_q</span><span class="p">)</span>
     <span class="c1"># Conditions for zero copy:</span>
     <span class="n">can_zero_copy</span> <span class="o">=</span> <span class="n">copy</span> <span class="ow">is</span> <span class="ow">not</span> <span class="kc">True</span>
     <span class="c1">#    dtype is unchanged</span>

pulls/2096/_sources/beginners_guides/installation.rst.txt

@@ -176,10 +176,11 @@ set ``DPCTL_TARGET_CUDA`` to a value such as ``ON``, ``TRUE``, ``YES``, ``Y``, o
 Note that kernels are built for ``sm_50`` by default, allowing them to work on a wider
 range of architectures, but limiting the usage of more recent CUDA features.
 
-For reference, compute architecture strings like ``sm_80`` are based on
-CUDA Compute Capability. A complete mapping between NVIDIA GPU models and their
-respective ``sm_XX`` values can be found in the official
-`CUDA GPU Compute Capability <https://developer.nvidia.com/cuda-gpus>`_.
+For reference, compute architecture strings like ``sm_80`` correspond to specific
+CUDA Compute Capabilities (e.g., Compute Capability 8.0 corresponds to ``sm_80``).
+A complete mapping between NVIDIA GPU models and their respective
+Compute Capabilities can be found in the official
+`CUDA GPU Compute Capability <https://developer.nvidia.com/cuda-gpus>`_ documentation.
 
 A full list of available SYCL alias targets is available in the
 `DPC++ Compiler User Manual <https://intel.github.io/llvm/UsersManual.html>`_.

pulls/2096/beginners_guides/installation.html

@@ -944,10 +944,11 @@ <h3>Building for custom SYCL targets<a class="headerlink" href="#building-for-cu
 </div>
 <p>Note that kernels are built for <code class="docutils literal notranslate"><span class="pre">sm_50</span></code> by default, allowing them to work on a wider
 range of architectures, but limiting the usage of more recent CUDA features.</p>
-<p>For reference, compute architecture strings like <code class="docutils literal notranslate"><span class="pre">sm_80</span></code> are based on
-CUDA Compute Capability. A complete mapping between NVIDIA GPU models and their
-respective <code class="docutils literal notranslate"><span class="pre">sm_XX</span></code> values can be found in the official
-<a class="reference external" href="https://developer.nvidia.com/cuda-gpus">CUDA GPU Compute Capability</a>.</p>
+<p>For reference, compute architecture strings like <code class="docutils literal notranslate"><span class="pre">sm_80</span></code> correspond to specific
+CUDA Compute Capabilities (e.g., Compute Capability 8.0 corresponds to <code class="docutils literal notranslate"><span class="pre">sm_80</span></code>).
+A complete mapping between NVIDIA GPU models and their respective
+Compute Capabilities can be found in the official
+<a class="reference external" href="https://developer.nvidia.com/cuda-gpus">CUDA GPU Compute Capability</a> documentation.</p>
 <p>A full list of available SYCL alias targets is available in the
 <a class="reference external" href="https://intel.github.io/llvm/UsersManual.html">DPC++ Compiler User Manual</a>.</p>
 <p>To build for AMD devices, use:</p>