@@ -655,14 +655,14 @@ cdef object __cbwr_set(branch=None):
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' sse4_2' : mkl.MKL_CBWR_SSE4_2,
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' avx' : mkl.MKL_CBWR_AVX,
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' avx2' : mkl.MKL_CBWR_AVX2,
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- ' avx2_strict ' : mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
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+ ' avx2,strict ' : mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
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' avx512_mic' : mkl.MKL_CBWR_AVX512_MIC,
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- ' avx512_mic_strict ' : mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
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+ ' avx512_mic,strict ' : mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
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' avx512' : mkl.MKL_CBWR_AVX512,
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- ' avx512_strict ' : mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT,
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+ ' avx512,strict ' : mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT,
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' avx512_mic_e1' : mkl.MKL_CBWR_AVX512_MIC_E1,
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' avx512_e1' : mkl.MKL_CBWR_AVX512_E1,
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- ' avx512_e1_strict ' : mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
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+ ' avx512_e1,strict ' : mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
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},
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' output' : {
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mkl.MKL_CBWR_SUCCESS: ' success' ,
@@ -700,14 +700,14 @@ cdef inline __cbwr_get(cnr_const=None):
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mkl.MKL_CBWR_SSE4_2: ' sse4_2' ,
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mkl.MKL_CBWR_AVX: ' avx' ,
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mkl.MKL_CBWR_AVX2: ' avx2' ,
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- mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2_strict ' ,
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+ mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2,strict ' ,
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mkl.MKL_CBWR_AVX512_MIC: ' avx512_mic' ,
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- mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic_strict ' ,
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+ mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic,strict ' ,
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mkl.MKL_CBWR_AVX512: ' avx512' ,
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- mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512_strict ' ,
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+ mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512,strict ' ,
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mkl.MKL_CBWR_AVX512_MIC_E1: ' avx512_mic_e1' ,
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mkl.MKL_CBWR_AVX512_E1: ' avx512_e1' ,
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- mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1_strict ' ,
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+ mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1,strict ' ,
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mkl.MKL_CBWR_ERR_INVALID_INPUT: ' err_invalid_input' ,
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},
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}
@@ -736,14 +736,14 @@ cdef object __cbwr_get_auto_branch():
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mkl.MKL_CBWR_SSE4_2: ' sse4_2' ,
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mkl.MKL_CBWR_AVX: ' avx' ,
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mkl.MKL_CBWR_AVX2: ' avx2' ,
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- mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2_strict ' ,
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+ mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2,strict ' ,
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mkl.MKL_CBWR_AVX512_MIC: ' avx512_mic' ,
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- mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic_strict ' ,
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+ mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic,strict ' ,
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mkl.MKL_CBWR_AVX512: ' avx512' ,
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- mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512_strict ' ,
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+ mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512,strict ' ,
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mkl.MKL_CBWR_AVX512_MIC_E1: ' avx512_mic_e1' ,
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mkl.MKL_CBWR_AVX512_E1: ' avx512_e1' ,
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- mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1_strict ' ,
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+ mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1,strict ' ,
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mkl.MKL_CBWR_SUCCESS: ' success' ,
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mkl.MKL_CBWR_ERR_INVALID_INPUT: ' err_invalid_input' ,
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},
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