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Merge pull request #10 from IntelPython/cbwr-roundtrip
Cbwr roundtrip
2 parents 0634e07 + 00ec43d commit d0a082b

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‎CHANGES.rst‎

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Original file line numberDiff line numberDiff line change
@@ -49,3 +49,9 @@ Closed issues #8, #7 and #5.
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Extended `mkl.cbwr_set` to recognize `'avx512_e1'`, `'avx512_mic_e1'`, as as strict conditional numerical reproducibility, supported via `'avx2,strict'`, `'avx512,strict'` (see [issue/8](http://github.com/IntelPython/mkl-service/issues/8)).
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Extended `mkl.cbwrt_get()` to mean `mkl.cbwr('all')`.
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2.3.0
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=====
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Fixed CI to actually execute tests. Populated CBWR constants to match MKL headers.
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Added tests checking that `cbwr_set` and `cbwr_get` round-trip.

‎conda-recipe/meta.yaml‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
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{% set version = "2.1.0" %}
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{% set version = "2.3.0" %}
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{% set buildnumber = 0 %}
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package:
@@ -20,20 +20,22 @@ requirements:
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host:
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- python
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- setuptools
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- mkl-devel
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- mkl-devel >=2019.3
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- cython
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run:
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- python
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- mkl
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- mkl >=2019.3
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- six
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test:
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commands:
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- nosetests -v mkl
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requires:
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- nose
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imports:
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- mkl
35+
commands:
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- nosetests -v tests
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source_files:
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- tests
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about:
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home: http://github.com/IntelPython/mkl-service

‎mkl/_mkl_service.pxd‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -45,26 +45,31 @@ cdef extern from "mkl.h":
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int MKL_MEM_MCDRAM
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# CNR Control Constants
48+
int MKL_CBWR_BRANCH
49+
int MKL_CBWR_ALL
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51+
int MKL_CBWR_STRICT
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53+
int MKL_CBWR_OFF
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int MKL_CBWR_BRANCH_OFF
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int MKL_CBWR_AUTO
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int MKL_CBWR_COMPATIBLE
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int MKL_CBWR_SSE2
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int MKL_CBWR_SSE3
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int MKL_CBWR_SSSE3
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int MKL_CBWR_SSE4_1
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int MKL_CBWR_SSE4_2
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int MKL_CBWR_AVX
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int MKL_CBWR_AVX2
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int MKL_CBWR_AVX512_MIC
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int MKL_CBWR_AVX512
59-
int MKL_CBWR_STRICT
60-
int MKL_CBWR_AVX512_E1
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int MKL_CBWR_AVX512_MIC_E1
62-
int MKL_CBWR_BRANCH
63-
int MKL_CBWR_ALL
66+
int MKL_CBWR_AVX512_E1
67+
6468
int MKL_CBWR_SUCCESS
65-
int MKL_CBWR_BRANCH_OFF
69+
int MKL_CBWR_ERR_INVALID_SETTINGS
6670
int MKL_CBWR_ERR_INVALID_INPUT
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int MKL_CBWR_ERR_UNSUPPORTED_BRANCH
72+
int MKL_CBWR_ERR_UNKNOWN_BRANCH
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int MKL_CBWR_ERR_MODE_CHANGE_FAILURE
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# ISA Constants

‎mkl/_mkl_service.pyx‎

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -645,23 +645,23 @@ cdef object __cbwr_set(branch=None):
645645
"""
646646
__variables = {
647647
'input': {
648-
'off': mkl.MKL_CBWR_BRANCH_OFF,
648+
'off': mkl.MKL_CBWR_OFF,
649+
'branch_off': mkl.MKL_CBWR_BRANCH_OFF,
649650
'auto': mkl.MKL_CBWR_AUTO,
650651
'compatible': mkl.MKL_CBWR_COMPATIBLE,
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'sse2': mkl.MKL_CBWR_SSE2,
652-
'sse3': mkl.MKL_CBWR_SSE3,
653653
'ssse3': mkl.MKL_CBWR_SSSE3,
654654
'sse4_1': mkl.MKL_CBWR_SSE4_1,
655655
'sse4_2': mkl.MKL_CBWR_SSE4_2,
656656
'avx': mkl.MKL_CBWR_AVX,
657657
'avx2': mkl.MKL_CBWR_AVX2,
658-
'avx512_mic': mkl.MKL_CBWR_AVX512_MIC,
659-
'avx512': mkl.MKL_CBWR_AVX512,
660-
'avx512_e1': mkl.MKL_CBWR_AVX512_E1,
661-
'avx512_mic_e1': mkl.MKL_CBWR_AVX512_MIC_E1,
662658
'avx2,strict': mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
659+
'avx512_mic': mkl.MKL_CBWR_AVX512_MIC,
663660
'avx512_mic,strict': mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
661+
'avx512': mkl.MKL_CBWR_AVX512,
664662
'avx512,strict': mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT,
663+
'avx512_mic_e1': mkl.MKL_CBWR_AVX512_MIC_E1,
664+
'avx512_e1': mkl.MKL_CBWR_AVX512_E1,
665665
'avx512_e1,strict': mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
666666
},
667667
'output': {
@@ -690,19 +690,23 @@ cdef inline __cbwr_get(cnr_const=None):
690690
'all': mkl.MKL_CBWR_ALL,
691691
},
692692
'output': {
693-
mkl.MKL_CBWR_BRANCH_OFF: 'off',
693+
mkl.MKL_CBWR_BRANCH_OFF: 'branch_off',
694694
mkl.MKL_CBWR_AUTO: 'auto',
695695
mkl.MKL_CBWR_COMPATIBLE: 'compatible',
696696
mkl.MKL_CBWR_SSE2: 'sse2',
697-
mkl.MKL_CBWR_SSE3: 'sse3',
698697
mkl.MKL_CBWR_SSSE3: 'ssse3',
699698
mkl.MKL_CBWR_SSE4_1: 'sse4_1',
700699
mkl.MKL_CBWR_SSE4_2: 'sse4_2',
701700
mkl.MKL_CBWR_AVX: 'avx',
702701
mkl.MKL_CBWR_AVX2: 'avx2',
702+
mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: 'avx2,strict',
703703
mkl.MKL_CBWR_AVX512_MIC: 'avx512_mic',
704+
mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: 'avx512_mic,strict',
704705
mkl.MKL_CBWR_AVX512: 'avx512',
705-
mkl.MKL_CBWR_SUCCESS: 'success',
706+
mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: 'avx512,strict',
707+
mkl.MKL_CBWR_AVX512_MIC_E1: 'avx512_mic_e1',
708+
mkl.MKL_CBWR_AVX512_E1: 'avx512_e1',
709+
mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: 'avx512_e1,strict',
706710
mkl.MKL_CBWR_ERR_INVALID_INPUT: 'err_invalid_input',
707711
},
708712
}
@@ -721,17 +725,25 @@ cdef object __cbwr_get_auto_branch():
721725
"""
722726
__variables = {
723727
'output': {
728+
mkl.MKL_CBWR_BRANCH_OFF: 'branch_off',
724729
mkl.MKL_CBWR_AUTO: 'auto',
725730
mkl.MKL_CBWR_COMPATIBLE: 'compatible',
726731
mkl.MKL_CBWR_SSE2: 'sse2',
727-
mkl.MKL_CBWR_SSE3: 'sse3',
728732
mkl.MKL_CBWR_SSSE3: 'ssse3',
729733
mkl.MKL_CBWR_SSE4_1: 'sse4_1',
730734
mkl.MKL_CBWR_SSE4_2: 'sse4_2',
731735
mkl.MKL_CBWR_AVX: 'avx',
732736
mkl.MKL_CBWR_AVX2: 'avx2',
737+
mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: 'avx2,strict',
733738
mkl.MKL_CBWR_AVX512_MIC: 'avx512_mic',
739+
mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: 'avx512_mic,strict',
734740
mkl.MKL_CBWR_AVX512: 'avx512',
741+
mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: 'avx512,strict',
742+
mkl.MKL_CBWR_AVX512_MIC_E1: 'avx512_mic_e1',
743+
mkl.MKL_CBWR_AVX512_E1: 'avx512_e1',
744+
mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: 'avx512_e1,strict',
745+
mkl.MKL_CBWR_SUCCESS: 'success',
746+
mkl.MKL_CBWR_ERR_INVALID_INPUT: 'err_invalid_input',
735747
},
736748
}
737749

‎tests/test_mkl_service.py‎

Lines changed: 41 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2525

2626

27-
from nose.tools import nottest
27+
from nose.tools import assert_equals, nottest
2828
import six
2929
import mkl
3030

@@ -131,7 +131,7 @@ def test_get_dynamic(self):
131131
mkl.get_dynamic()
132132

133133

134-
class test_timing:
134+
class test_timing():
135135
# https://software.intel.com/en-us/mkl-developer-reference-c-timing
136136
def test_second(self):
137137
s1 = mkl.second()
@@ -191,49 +191,46 @@ def test_set_memory_limit(self):
191191
mkl.set_memory_limit(128)
192192

193193

194-
class test_conditional_numerical_reproducibility_control:
194+
class test_cnr_control():
195195
# https://software.intel.com/en-us/mkl-developer-reference-c-conditional-numerical-reproducibility-control
196-
def test_cbwr_set_off(self):
197-
mkl.cbwr_set(branch='off')
198-
199-
def test_cbwr_set_auto(self):
200-
mkl.cbwr_set(branch='auto')
201-
202-
def test_cbwr_set_compatible(self):
203-
mkl.cbwr_set(branch='compatible')
204-
205-
def test_cbwr_set_sse2(self):
206-
mkl.cbwr_set(branch='sse2')
207-
208-
def test_cbwr_set_sse3(self):
209-
mkl.cbwr_set(branch='sse3')
210-
211-
def test_cbwr_set_ssse3(self):
212-
mkl.cbwr_set(branch='ssse3')
213-
214-
def test_cbwr_set_sse4_1(self):
215-
mkl.cbwr_set(branch='sse4_1')
216-
217-
def test_cbwr_set_sse4_2(self):
218-
mkl.cbwr_set(branch='sse4_2')
219-
220-
def test_cbwr_set_avx(self):
221-
mkl.cbwr_set(branch='avx')
222-
223-
def test_cbwr_set_avx2(self):
224-
mkl.cbwr_set(branch='avx2')
225-
226-
def test_cbwr_set_avx512_mic(self):
227-
mkl.cbwr_set(branch='avx512_mic')
228-
229-
def test_cbwr_set_avx512(self):
230-
mkl.cbwr_set(branch='avx512')
231-
232-
def test_cbwr_get(self):
233-
mkl.cbwr_get(cnr_const='all')
234-
235-
def test_cbwr_get(self):
236-
mkl.cbwr_get(cnr_const='branch')
196+
def test_cbwr(self):
197+
branches = [
198+
'off',
199+
'branch_off',
200+
'auto',
201+
'compatible',
202+
'sse2',
203+
'ssse3',
204+
'sse4_1',
205+
'sse4_2',
206+
'avx',
207+
'avx2',
208+
'avx512_mic',
209+
'avx512',
210+
'avx512_mic_e1',
211+
'avx512_e1',
212+
]
213+
strict = [
214+
'avx2,strict',
215+
'avx512_mic,strict',
216+
'avx512,strict',
217+
'avx512_e1,strict',
218+
]
219+
for branch in branches:
220+
yield self.check_cbwr, branch, 'branch'
221+
for branch in branches + strict:
222+
yield self.check_cbwr, branch, 'all'
223+
224+
def check_cbwr(self, branch, cnr_const):
225+
status = mkl.cbwr_set(branch=branch)
226+
if status == 'success':
227+
expected_value = 'branch_off' if branch == 'off' else branch
228+
actual_value = mkl.cbwr_get(cnr_const=cnr_const)
229+
assert_equals(actual_value,
230+
expected_value,
231+
msg="Round-trip failure for CNR branch '{}', CNR const '{}'".format(branch, cnr_const))
232+
elif status != 'err_unsupported_branch':
233+
raise AssertionError(status)
237234

238235
def test_cbwr_get_auto_branch(self):
239236
mkl.cbwr_get_auto_branch()

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