@@ -645,24 +645,24 @@ cdef object __cbwr_set(branch=None):
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"""
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__variables = {
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' input' : {
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- ' off' : mkl.MKL_CBWR_BRANCH_OFF,
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+ ' off' : mkl.MKL_CBWR_OFF,
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+ ' branch_off' : mkl.MKL_CBWR_BRANCH_OFF,
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' auto' : mkl.MKL_CBWR_AUTO,
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' compatible' : mkl.MKL_CBWR_COMPATIBLE,
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' sse2' : mkl.MKL_CBWR_SSE2,
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- ' sse3' : mkl.MKL_CBWR_SSE3,
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' ssse3' : mkl.MKL_CBWR_SSSE3,
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' sse4_1' : mkl.MKL_CBWR_SSE4_1,
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' sse4_2' : mkl.MKL_CBWR_SSE4_2,
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' avx' : mkl.MKL_CBWR_AVX,
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' avx2' : mkl.MKL_CBWR_AVX2,
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+ ' avx2_strict' : mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
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' avx512_mic' : mkl.MKL_CBWR_AVX512_MIC,
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+ ' avx512_mic_strict' : mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
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' avx512' : mkl.MKL_CBWR_AVX512,
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- ' avx512_e1 ' : mkl.MKL_CBWR_AVX512_E1 ,
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+ ' avx512_strict ' : mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT ,
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' avx512_mic_e1' : mkl.MKL_CBWR_AVX512_MIC_E1,
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- ' avx2,strict' : mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT,
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- ' avx512_mic,strict' : mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT,
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- ' avx512,strict' : mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT,
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- ' avx512_e1,strict' : mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
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+ ' avx512_e1' : mkl.MKL_CBWR_AVX512_E1,
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+ ' avx512_e1_strict' : mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT,
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},
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' output' : {
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mkl.MKL_CBWR_SUCCESS: ' success' ,
@@ -690,19 +690,24 @@ cdef inline __cbwr_get(cnr_const=None):
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' all' : mkl.MKL_CBWR_ALL,
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},
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' output' : {
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- mkl.MKL_CBWR_BRANCH_OFF: ' off' ,
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+ mkl.MKL_CBWR_OFF: ' off' ,
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+ mkl.MKL_CBWR_BRANCH_OFF: ' branch_off' ,
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mkl.MKL_CBWR_AUTO: ' auto' ,
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mkl.MKL_CBWR_COMPATIBLE: ' compatible' ,
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mkl.MKL_CBWR_SSE2: ' sse2' ,
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- mkl.MKL_CBWR_SSE3: ' sse3' ,
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mkl.MKL_CBWR_SSSE3: ' ssse3' ,
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mkl.MKL_CBWR_SSE4_1: ' sse4_1' ,
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mkl.MKL_CBWR_SSE4_2: ' sse4_2' ,
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mkl.MKL_CBWR_AVX: ' avx' ,
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mkl.MKL_CBWR_AVX2: ' avx2' ,
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+ mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2_strict' ,
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mkl.MKL_CBWR_AVX512_MIC: ' avx512_mic' ,
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+ mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic_strict' ,
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mkl.MKL_CBWR_AVX512: ' avx512' ,
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- mkl.MKL_CBWR_SUCCESS: ' success' ,
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+ mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512_strict' ,
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+ mkl.MKL_CBWR_AVX512_MIC_E1: ' avx512_mic_e1' ,
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+ mkl.MKL_CBWR_AVX512_E1: ' avx512_e1' ,
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+ mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1_strict' ,
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mkl.MKL_CBWR_ERR_INVALID_INPUT: ' err_invalid_input' ,
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},
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}
@@ -721,17 +726,26 @@ cdef object __cbwr_get_auto_branch():
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"""
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__variables = {
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' output' : {
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+ mkl.MKL_CBWR_OFF: ' off' ,
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+ mkl.MKL_CBWR_BRANCH_OFF: ' branch_off' ,
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mkl.MKL_CBWR_AUTO: ' auto' ,
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mkl.MKL_CBWR_COMPATIBLE: ' compatible' ,
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mkl.MKL_CBWR_SSE2: ' sse2' ,
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- mkl.MKL_CBWR_SSE3: ' sse3' ,
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mkl.MKL_CBWR_SSSE3: ' ssse3' ,
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mkl.MKL_CBWR_SSE4_1: ' sse4_1' ,
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mkl.MKL_CBWR_SSE4_2: ' sse4_2' ,
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mkl.MKL_CBWR_AVX: ' avx' ,
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mkl.MKL_CBWR_AVX2: ' avx2' ,
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+ mkl.MKL_CBWR_AVX2 | mkl.MKL_CBWR_STRICT: ' avx2_strict' ,
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mkl.MKL_CBWR_AVX512_MIC: ' avx512_mic' ,
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+ mkl.MKL_CBWR_AVX512_MIC | mkl.MKL_CBWR_STRICT: ' avx512_mic_strict' ,
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mkl.MKL_CBWR_AVX512: ' avx512' ,
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+ mkl.MKL_CBWR_AVX512 | mkl.MKL_CBWR_STRICT: ' avx512_strict' ,
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+ mkl.MKL_CBWR_AVX512_MIC_E1: ' avx512_mic_e1' ,
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+ mkl.MKL_CBWR_AVX512_E1: ' avx512_e1' ,
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+ mkl.MKL_CBWR_AVX512_E1 | mkl.MKL_CBWR_STRICT: ' avx512_e1_strict' ,
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+ mkl.MKL_CBWR_SUCCESS: ' success' ,
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+ mkl.MKL_CBWR_ERR_INVALID_INPUT: ' err_invalid_input' ,
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},
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}
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