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| 1 | +# SPDX-FileCopyrightText: 2023 Intel Corporation |
| 2 | +# |
| 3 | +# SPDX-License-Identifier: Apache-2.0 |
| 4 | + |
| 5 | +""" |
| 6 | +Provides overloads for functions included in kernel_iface.barrier that |
| 7 | +generate dpcpp SPIR-V LLVM IR intrinsic function calls. |
| 8 | +""" |
| 9 | +import warnings |
| 10 | + |
| 11 | +from llvmlite import ir as llvmir |
| 12 | +from numba.core import cgutils, types |
| 13 | +from numba.extending import intrinsic, overload |
| 14 | + |
| 15 | +from numba_dpex.core import itanium_mangler as ext_itanium_mangler |
| 16 | +from numba_dpex.experimental.target import DPEX_KERNEL_EXP_TARGET_NAME |
| 17 | +from numba_dpex.kernel_api import group_barrier |
| 18 | +from numba_dpex.kernel_api.memory_enums import MemoryOrder, MemoryScope |
| 19 | + |
| 20 | +from ._spv_atomic_inst_helper import get_memory_semantics_mask, get_scope |
| 21 | + |
| 22 | +_SUPPORT_CONVERGENT = True |
| 23 | + |
| 24 | +try: |
| 25 | + llvmir.FunctionAttributes("convergent") |
| 26 | +except ValueError: |
| 27 | + warnings.warn( |
| 28 | + "convergent attribute is supported only starting llvmlite " |
| 29 | + + "0.42. Not setting this attribute may result into unexpected behavior" |
| 30 | + + "when using group_barrier" |
| 31 | + ) |
| 32 | + _SUPPORT_CONVERGENT = False |
| 33 | + |
| 34 | + |
| 35 | +def _get_memory_scope(fence_scope): |
| 36 | + if isinstance(fence_scope, types.Literal): |
| 37 | + return get_scope(fence_scope.literal_value) |
| 38 | + return get_scope(fence_scope.value) |
| 39 | + |
| 40 | + |
| 41 | +@intrinsic |
| 42 | +def _intrinsic_barrier( |
| 43 | + ty_context, # pylint: disable=unused-argument |
| 44 | + ty_exec_scope, # pylint: disable=unused-argument |
| 45 | + ty_mem_scope, # pylint: disable=unused-argument |
| 46 | + ty_spirv_mem_sem_mask, # pylint: disable=unused-argument |
| 47 | +): |
| 48 | + # Signature of `__spirv_control_barrier` call that is |
| 49 | + # generated for group_barrier. It takes three arguments - |
| 50 | + # exec_scope, memory_scope and memory_semantics_mask. |
| 51 | + # All arguments have to be of type unsigned int32. |
| 52 | + sig = types.void(types.uint32, types.uint32, types.uint32) |
| 53 | + |
| 54 | + def _intrinsic_barrier_codegen( |
| 55 | + context, builder, sig, args # pylint: disable=unused-argument |
| 56 | + ): |
| 57 | + exec_scope_arg = builder.trunc(args[0], llvmir.IntType(32)) |
| 58 | + mem_scope_arg = builder.trunc(args[1], llvmir.IntType(32)) |
| 59 | + spirv_memory_semantics_mask_arg = builder.trunc( |
| 60 | + args[2], llvmir.IntType(32) |
| 61 | + ) |
| 62 | + |
| 63 | + fn_args = [ |
| 64 | + exec_scope_arg, |
| 65 | + mem_scope_arg, |
| 66 | + spirv_memory_semantics_mask_arg, |
| 67 | + ] |
| 68 | + |
| 69 | + mangled_fn_name = ext_itanium_mangler.mangle_ext( |
| 70 | + "__spirv_ControlBarrier", [types.uint32, types.uint32, types.uint32] |
| 71 | + ) |
| 72 | + |
| 73 | + spirv_fn_arg_types = [ |
| 74 | + llvmir.IntType(32), |
| 75 | + llvmir.IntType(32), |
| 76 | + llvmir.IntType(32), |
| 77 | + ] |
| 78 | + |
| 79 | + # TODO: split the function declaration from call |
| 80 | + fn = cgutils.get_or_insert_function( |
| 81 | + builder.module, |
| 82 | + llvmir.FunctionType(llvmir.VoidType(), spirv_fn_arg_types), |
| 83 | + mangled_fn_name, |
| 84 | + ) |
| 85 | + |
| 86 | + if _SUPPORT_CONVERGENT: |
| 87 | + fn.attributes.add("convergent") |
| 88 | + fn.attributes.add("nounwind") |
| 89 | + fn.calling_convention = "spir_func" |
| 90 | + |
| 91 | + callinst = builder.call(fn, fn_args) |
| 92 | + |
| 93 | + if _SUPPORT_CONVERGENT: |
| 94 | + callinst.attributes.add("convergent") |
| 95 | + callinst.attributes.add("nounwind") |
| 96 | + |
| 97 | + return ( |
| 98 | + sig, |
| 99 | + _intrinsic_barrier_codegen, |
| 100 | + ) |
| 101 | + |
| 102 | + |
| 103 | +@overload( |
| 104 | + group_barrier, |
| 105 | + prefer_literal=True, |
| 106 | + target=DPEX_KERNEL_EXP_TARGET_NAME, |
| 107 | +) |
| 108 | +def ol_group_barrier(fence_scope=MemoryScope.WORK_GROUP): |
| 109 | + """SPIR-V overload for |
| 110 | + :meth:`numba_dpex.kernel_api.group_barrier`. |
| 111 | +
|
| 112 | + Generates the same LLVM IR instruction as dpcpp for the |
| 113 | + `group_barrier` function. |
| 114 | +
|
| 115 | + Per SYCL spec, group_barrier must perform both control barrier and memory |
| 116 | + fence operations. Hence, group_barrier requires two scopes and memory |
| 117 | + consistency specification as three arguments. |
| 118 | +
|
| 119 | + mem_scope - scope of any memory consistency operations that are performed by |
| 120 | + the barrier. By default, mem_scope is set to `work_group`. |
| 121 | + exec_scope - scope that determines the set of work-items that synchronize at |
| 122 | + barrier. Set to `work_group` for group_barrier always. |
| 123 | + spirv_memory_semantics_mask - Based on sycl implementation. |
| 124 | +
|
| 125 | + Mask that is set to use sequential consistency memory order semantics |
| 126 | + always. |
| 127 | + """ |
| 128 | + |
| 129 | + mem_scope = _get_memory_scope(fence_scope) |
| 130 | + exec_scope = get_scope(MemoryScope.WORK_GROUP.value) |
| 131 | + spirv_memory_semantics_mask = get_memory_semantics_mask( |
| 132 | + MemoryOrder.SEQ_CST.value |
| 133 | + ) |
| 134 | + |
| 135 | + def _ol_group_barrier_impl( |
| 136 | + fence_scope=MemoryScope.WORK_GROUP, |
| 137 | + ): # pylint: disable=unused-argument |
| 138 | + # pylint: disable=no-value-for-parameter |
| 139 | + return _intrinsic_barrier( |
| 140 | + exec_scope, mem_scope, spirv_memory_semantics_mask |
| 141 | + ) |
| 142 | + |
| 143 | + return _ol_group_barrier_impl |
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